Method for designing triple-modular redundancy type fault-tolerant computer IP core with fault spontaneous restoration function

Abstract

The invention designs a triple-modular redundancy type fault-tolerant computer core consisting of three basic CPU cores, namely, three same basic CPU cores are combined into one fault-tolerant computer core, a triple-modular redundancy mode is adopted, and when any one basic CPU core has a fault, the correctness of computer calculation continues to be kept and the fault is spontaneously corrected. According to the computer core, the correct basic CPU core refreshes the basic CPU core with the fault by adopting an automatic refreshing technology, so that the fault is eliminated and a normal working state is recovered. A designed IP core is an independent fault-tolerant computer core in the form of a soft core and used for automatically detecting a single-point fault caused by a single-particle effect, automatically obtaining a correct result and spontaneously correcting the fault. The technical scheme of the invention solves the problem in design of the fault-tolerant computer IP core by adopting the triple-modular redundancy technology, and can be used for FPGA application development and integrated circuit design.

Description

technical field [0001] The invention relates to a design method of a triple-mode redundant fault-tolerant computer IP core (IntellectualPropertyCore, intellectual property core) with a fault autonomous recovery function, which is suitable for field programmable logic (FPGA, Field Programable Gate Array) with high reliability requirements such as aerospace and aviation. Development and related integrated circuit (ASIC) design. Background technique [0002] Intellectual Property Core (IP core for short) refers to a logic block or data block specially designed to complete a specific function, mainly used in the design of integrated circuits (ASIC) and field programmable logic (FPGA). An integrated circuit is a combination of multiple IP cores and associated logic circuits. IP core is an indispensable part in FPGA development and application. At present, mainstream integrated circuit suppliers in the world have a large number of IP cores as their core assets. IP core represen...

AI Technical Summary

Problems solved by technology

But there are still the following problems unsolved: (1) When the phenomenon of "single event upset" occurs, the faulty device can only be eliminated by resetting or restarting, which will cause data loss and time loss

(2) The CPU is the most critical module. At present, there is no soft core of the CPU core that can achieve efficient and practical redundancy solutions.

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