FPGA single event upset fault simulation test system and method

Abstract

The invention relates to an FPGA single event upset fault simulation test system and method. The method comprises the steps that S1, a reference configuration file and a new configuration file are generated by a configuration file generation and comparison module, and the upset digits of the two files are obtained through comparison; S2, the reference configuration file and the new configuration file are respectively injected into the monitored FPGA in an FPGA configuration program on-orbit monitoring platform via a configuration file injection module, and a frequency division signal is generated; S3, the tested on-orbit monitoring module in the FPGA configuration program on-orbit monitoring platform is started, the upset digits of the reference configuration file and the new configuration file are obtained through comparison, and the file data in the monitored FPGA are refreshed; and S4, an on-orbit monitoring verification result is obtained via a fault analysis module. Accuracy of an FPGA on-orbit monitoring function can be guaranteed; and test coverage is great, cost is low, time consumption is low, realization technical difficulty is low in engineering, and implementation of debugging verification in the early phase of the project is facilitated.

Description

technical field [0001] The invention relates to a test system and method for simulating FPGA single-event flip faults in order to verify the on-orbit monitoring function of FPGA (Field-Programmable Gate Array, Field Programmable Gate Array) in satellite or aircraft load, and belongs to the field of reliability of on-board electronic equipment . Background technique [0002] As the altitude of the flight orbit increases, the electronic equipment in the satellite or aircraft is more susceptible to the impact of high-energy particles, especially when the configuration program inside the FPGA is flipped by a single event, when the number reaches a certain level, the FPGA function will fail. The FPGA on-orbit monitoring periodically monitors whether the FPGA configuration program is flipped and dynamically refreshes the configuration area. It is necessary to simulate a single event flip fault on the ground to verify whether the FPGA on-orbit monitoring is correct. [0003] At pr...

AI Technical Summary

Problems solved by technology

The failure simulation test using the method of heavy particle irradiation on FPGA has the disadvantages of high test cost, accelerator reservation and non-reusable devices under test

However, using the method of fault injection requires the establishment of a complex test system. The object under test is FPGA, which cannot verify the function of the on-orbit monitoring program.

Therefore, none of the above methods solves the problem of implementing functional verification on the hardware platform of FPGA on-orbit monitoring.

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