Three-dimensional array-intersected array resistive random access memory and method for manufacturing the memory

A technology of resistive memory and cross array, which is applied to semiconductor devices, electric solid-state devices, electrical components, etc., can solve problems such as blank preparation methods, and achieve the effect of achieving transparency and low manufacturing cost.

Inactive Publication Date: 2015-06-10
PEKING UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In the prior art, low-cost, large-area and high-integration three-dimensional cross-structure transparent resistive memory and its preparation method are relatively blank.

Method used

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  • Three-dimensional array-intersected array resistive random access memory and method for manufacturing the memory
  • Three-dimensional array-intersected array resistive random access memory and method for manufacturing the memory
  • Three-dimensional array-intersected array resistive random access memory and method for manufacturing the memory

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preparation example Construction

[0044] The present invention is an embodiment and also provides a method for preparing a three-dimensional cross-array transparent resistive memory, the method comprising:

[0045] Ultrasonic cleaning of the glass substrate and drying of the cleaned glass substrate;

[0046] Extending and depositing lines of the first transparent oxide lower electrode thin film layer on the glass substrate along the first direction by using a screen printing process;

[0047] Depositing a first transparent oxide resistive layer on the glass substrate and the first transparent oxide lower electrode film layer by using a sol-gel process;

[0048] Using a screen printing process, extending and depositing lines of the first transparent oxide upper electrode thin film layer on the first transparent oxide resistive layer along the second direction;

[0049] Depositing a dielectric isolation layer on the first transparent oxide upper electrode film layer by using a chemical vapor deposition process;...

Embodiment 1

[0055] The transparent oxide electrode layers 12, 14, 31, and 33 in the embodiment of the present invention are Sn-doped indium oxide layer screen-printed films;

[0056] The resistive material in the transparent oxide resistive layer 13, 32 is zirconium dioxide;

[0057] The dielectric isolation layer 21 is organic transparent material parylene (Parylene);

[0058] figure 2 It is a schematic diagram of the processing flow of the preparation method of the three-dimensional cross-array transparent resistive memory in the present invention; wherein, figure 2 The left part of is the front view of the resistive memory during the preparation process of the three-dimensional cross-array transparent resistive memory, figure 2 The right part of is the side view of the resistive memory during the preparation process of the three-dimensional cross-array transparent resistive memory;

[0059] The manufacturing method of the three-dimensional cross-array transparent resistive memory...

Embodiment 2

[0068] The transparent oxide electrode layers 12, 14, 31, 33 in the embodiment of the present invention are Sn-doped indium oxide thin films;

[0069] The resistive material in the transparent oxide resistive layer 13, 32 is zirconium dioxide;

[0070] The dielectric isolation layer 21 is organic transparent material parylene (Parylene);

[0071] The preparation method of the three-dimensional cross-array transparent resistive memory provided in this embodiment is divided into the following steps:

[0072] (1) For example figure 2 The glass substrate in the first step is ultrasonically cleaned in absolute ethanol solution for 10 minutes, and the temperature of the water bath is controlled at about 50°C;

[0073] (2) drying the cleaned glass substrate in an oven, the temperature is controlled at about 60°C;

[0074] (3) Using the sol-gel process, choosing indium nitrate hydrate and stannous chloride hydrate as precursors, absolute ethanol as solvent, and acetylacetone as st...

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Abstract

The invention discloses a three-dimensional array-intersected array resistive random access memory and a method for manufacturing the memory. The three-dimensional array-intersected array resistive random access memory comprises a first resistive random access memory layer region, a second resistive random access memory layer region and a medium separation layer, wherein the medium separation layer is arranged on the first resistive random access memory layer region; the second resistive random access memory layer region is arranged on the medium separation layer; the first resistive random access memory layer region comprises a first transparent glass substrate, a first transparent oxide bottom electrode film layer, a first transparent oxide resistance change layer and a first transparent oxide top electrode film layer; the second resistive random access memory layer region comprises a second transparent oxide bottom electrode film layer, a second transparent oxide resistance change layer and a third transparent oxide top electrode film layer. The memory and the method are low in manufacturing cost, convenient to process, and high in large-area integration level, thus the large-scale three-dimensional array-intersected array resistive random access memory can be manufactured and applied to the transparent electronics.

Description

technical field [0001] The invention relates to the technical field of transparent resistive memory, in particular to a three-dimensional cross-array transparent resistive memory based on transparent oxide and a preparation method thereof. Background technique [0002] Resistive Random Access Memory (RRAM) is a non-volatile memory research field that has emerged in recent years. It is favored due to its high storage density, low power consumption, high durability, high durability, and CMOS process compatibility. It has great potential to replace Flash in the future. The three-dimensional resistive memory first appeared in 2009, which greatly improves the integration level while ensuring relatively low manufacturing costs, so it is considered to be the only way for resistive memory to go commercial. Currently, the more common three-dimensional structures of RRAMs include 1R cross array, 1D1R, and 1T1R. [0003] Transparent circuit system is the representative of next-genera...

Claims

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Application Information

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IPC IPC(8): H01L45/00H01L27/24
Inventor 刘力锋王逸然高滨韩德栋王漪康晋锋张兴
Owner PEKING UNIV
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