Gpu memory buffer pre-fetch and pre-back signaling to avoid page-fault

Abstract

This disclosure proposes techniques for demand paging for an IO device (e.g., a GPU) that utilize pre-fetch and pre-back notification event signaling to reduce latency associated with demand paging. Page faults are limited by performing the demand paging operations prior to the IO device actually requesting unbacked memory.

Description

technical field [0001] The present invention relates to techniques for graphics processing, and more particularly to techniques for prefetch and prebackup signaling from a graphics processing unit (GPU) for avoiding page faults in a virtual memory system. Background technique [0002] Visual content for display (eg, graphical user interfaces and content for video games) may be generated by a graphics processing unit (GPU). A GPU can convert two-dimensional or three-dimensional (3D) objects into a displayable two-dimensional (2D) pixel representation. Additionally, GPUs are increasingly being used to perform certain types of computations that are efficiently handled by the highly parallel nature of GPU cores. Such applications are sometimes referred to as general-purpose GPU (GPGPU) applications. Converting information about 3D objects into displayable bitmaps and large GPGPU applications requires considerable memory and processing power. GPU processing inefficiencies can ...

AI Technical Summary

Problems solved by technology

GPU processing inefficiencies can often occur during memory accesses due to the lack of techniques for stopping and resuming highly parallel jobs executing on the GPU

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