Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Fault injection method for Nand Flash simulation model with controllable bit flipping

A technology of simulation model and number of digits, which is applied in the field of code error correction and verification of Nand Flash controllers, and can solve problems such as poor controllability and complicated operation methods

Active Publication Date: 2015-04-22
SHANDONG SINOCHIP SEMICON
View PDF4 Cites 8 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Existing Nand Flash simulation models generally use the idea of ​​front-end RTL design and are written and implemented in Verilog language. Although this method can also realize the simple bit flip function of the Nand Flash model, the operation method is complicated and the controllability is poor, which cannot meet the needs of verification engineers. Randomized control over bit flips and number of bit flips while simulating

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Fault injection method for Nand Flash simulation model with controllable bit flipping
  • Fault injection method for Nand Flash simulation model with controllable bit flipping

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0013] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0014] The wrong note method of the controllable Nand Flash emulation model of bit flipping of the present invention, the page size of setting Nand Flash is bit, the addressing bits of data stored in the Nand Flash page is , the page size of commonly used Nand Flash is 8KB or 16KB, namely bit is equal to bit or bit, the encoding error correction verification method is realized through the following steps:

[0015] a). Determine the type of bit flip, determine whether the number of bit flips is randomly generated or artificially set, if it is randomly generated, then perform step b); if it is artificially set, then perform step c);

[0016] b). Randomly generate the number of bit flips, within the limited bit flip interval Randomly generate a data within, use this random data as the number of bit flips in the Nand Flash page, perform step d); ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses an injection method for a Nand Flash simulation model with controllable bit flipping. The injection method comprises the following steps: a), judging a bit flipping mode; b), randomly generating a bit flipping quantity; c),artificially setting the bit flipping quantity; d), establishing Err_pos_gen, and defining a fault position variable Err_pos; e), estabilihsing an Injet_err type, establishing a two-dimensional array which is 2<N>-1 deep and 8bit wide; f) defining a flipping bit, defining a bit flipping variable err_mum_one_byte, assigning the err-bit by utilizing a principle of corresponding a value 1 in err_mum_one_byte, to the flipping bit position of 8bit data in a Nand Flash page; g) performing data fault injection operation, performing xor operation on data in the err_bit and the data in io_data_buf; h) judging fault correcting capacity. The coding error-correcting verification method can be used for performing quantity and position controllable verification method in Nand Flash page, flexibly increasing data bit random fault inseration an beneficial to quickly completing NFC verification more comprehensively.

Description

technical field [0001] The present invention relates to a kind of error note method of Nand Flash emulation model that bit flipping is controllable, more specifically, relate to a kind of encoding error correction verification method of Nand Flash controller that can control the number and position of flipped bits . Background technique [0002] Although the existing Nand Flash simulation model realizes the functions of reading, writing, erasing, and timing inspection of Nand flash operations, when verifying the error correction coding function of the flash memory controller (Nand Flash Controller, NFC), the random insertion of stored data bits The wrong function is difficult to implement. [0003] Nand flash (flash memory) has the advantages of small storage unit area, fast programming speed, short erasing time, and low power consumption. It has become a very popular mass storage medium in the industry. However, all Nand Flash devices are subject to bit flipping. troubled...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/26G11C29/42
Inventor 姚香君戴绍新李风志杨萌李文军石易明
Owner SHANDONG SINOCHIP SEMICON
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products