Decoder allowing independent descrambling of two television programs and controlling of distributed output of TS (transport streaming) flows

Abstract

The invention discloses a decoder allowing independent descrambling of two television programs and controlling of distributed output of TS (transport streaming) flows. The decoder comprises an FPGA (field programmable gate array) module, a signal receiving module, a main chip module, a program descrambling module, an ASI (asynchronous serial interface) output module and an audio-video output module; the FPGA module is used for processing and distributing original encrypted TS flows and descrambled TS flows; the signal receiving module connected with the FPGA module is used for receiving two digital television programs of independent frequencies and outputting original TS flows; the main chip module connected with the FPGA module is used for controlling a system and decoding and playing audio-video; the program descrambling module connected with the FPGA module is used for descrambling the TS flows of the two television programs and outputting the descrambled TS flows through two PCMCIA (personal computer memory card international association) CAM (conditional access module) cards; the ASI output module connected with the FPGA module is used for converting and outputting parallel TS flows to an ASI interface; the audio-video output module connected with the main chip module is used for outputting descrambled and decoded television programs. The decoder has the advantages such as operational flexibility, high compatibility and low cost.

Description

technical field [0001] The invention relates to a decoder, in particular to a decoder for realizing independent descrambling of two TV programs and controlling the distribution and output of TS streams. Background technique [0002] FIFO is the abbreviation of First Input First Output, a first-in-first-out queue, which is a traditional sequential execution method. The instruction that enters first is completed and retired first, and then the second instruction is executed. It is a first-in-first-out data buffer. The difference between it and ordinary memory is that there is no external read-write address line, so it is very simple to use, but the disadvantage is that it can only write data sequentially, read data sequentially, and its data address The internal reading and writing pointer is automatically increased by 1, and it cannot be read or written to a specified address by the address line as in ordinary memory. Most of the current digital TV programs are transmitted b...

AI Technical Summary

Problems solved by technology

Professional decoders on the existing market generally support 2 PCMCIA cards for descrambling, but 2 PCMCIA cards can only descramble multiple sets of programs at a single frequency point, and cannot truly realize 2 PCMCIA cards independently descrambling two channels Scrambled digital TV program output

Professional decoders generally use ASI interface output, which is a professional application interface. If a professional interface chip is used to realize the ASI interface output function, the chip is expensive, and the TS stream output is not flexible

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