Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

A high voltage esd protection device with ldmos‑scr interdigitated structure

A LDMOS-SCR, ESD protection technology, applied in the direction of electric solid state devices, semiconductor devices, electrical components, etc., to achieve the effect of improving the maintenance voltage and ESD robustness, realizing ESD protection requirements, and strong current discharge capability

Active Publication Date: 2017-02-01
JIANGNAN UNIV
View PDF3 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, on the one hand, because the ESD protection design is limited by the working characteristics of the protected circuit, and on the other hand, due to the increasing demand for electrostatic protection level of consumer electronics, it is difficult for the ESD protection design of the on-chip high-voltage IC to break through the bottleneck of the existing technology.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A high voltage esd protection device with ldmos‑scr interdigitated structure
  • A high voltage esd protection device with ldmos‑scr interdigitated structure
  • A high voltage esd protection device with ldmos‑scr interdigitated structure

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0026] Below in conjunction with accompanying drawing and specific embodiment the present invention will be described in further detail:

[0027] The present invention proposes a high-voltage ESD protection device with an LDMOS-SCR-like interdigitated structure. Due to the special design of the internal structure and the reasonable control of key characteristic parameters, the device in the embodiment of the present invention has an ESD protection device with an SCR structure. The advantages of fast, small on-resistance, and large secondary breakdown current; and the parasitic NPN tube controls the electron emission rate of the floating LDMOS structure, and adjusts the maintenance voltage of the device. Also, by introducing the LDMOS-SCR interdigitated structure, the on-resistance of the device is reduced, and high-performance ESD protection with strong ESD robustness is realized. In addition, it is also beneficial to expand the application range of the device of the embodimen...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A high-voltage ESD protection device for LDMOS-SCR interdigital structures can be used for ESD protection circuits of on-chip high-voltage ICs, and is mainly composed of a P-type substrate, an N-type buried layer, an N well, a P well, a plurality of P<+> injection regions, a plurality of N<+> injection regions, a polycrystalline silicon double-gate and a plurality of field oxygen isolation areas. The ESD protection device can form two ESD current discharging paths formed by connecting the LDMOS-SCR structures in parallel under the high-voltage ESD pulse action. Both the current discharging paths take a parasitic NPN pipe and a P well resistor as a common branch, so that the electron emissivity of the device is reduced, the maintaining voltage is raised, and the ESD robustness is improved. On the other hand, a parasitic NPN transistor is designed in the device to control a floating LDMOS structure, so that the electron emissivity of the LDMOS-SCR devices is reduced, and the maintaining voltage is raised; the current discharging capacity of an N-type conducting channel of the floating LDMOS structure can also be improved, and the ESD robustness of the device is improved.

Description

technical field [0001] The invention belongs to the field of electrostatic protection of integrated circuits, relates to a high-voltage ESD protection device, in particular to a high-voltage ESD protection device with high sustain voltage and strong ESD robustness, which can be used to improve the reliability of on-chip high-voltage IC ESD protection. Background technique [0002] With the rapid development of power integration technology, electronic products are increasingly miniaturized and complex, and the demand for mobile hard disks, flash memory cards, USB interfaces, and smart phone display touch screens is increasing, and the reliability of on-chip high-voltage IC products is also becoming increasingly prominent. . For example, the flash memory card cannot read data suddenly, the USB interface cannot carry out data communication, and the reliability problems such as the sudden black screen of the display touch screen have attracted more and more attention. The high-...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/02H01L29/06
Inventor 梁海莲毕秀文顾晓峰丁盛
Owner JIANGNAN UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products