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Electrostatic discharge structure and chip with the same

An electrostatic discharge and chip technology, applied in the field of electrostatic discharge structures, can solve problems such as increasing the burden on integrated circuits and reducing system performance, and achieve the effect of improving robustness

Inactive Publication Date: 2014-12-24
MEDIATEK INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, additional charging device model clamping circuits often burden the overall system in the integrated circuit and degrade system performance

Method used

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  • Electrostatic discharge structure and chip with the same
  • Electrostatic discharge structure and chip with the same
  • Electrostatic discharge structure and chip with the same

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Embodiment Construction

[0018] The following description is a preferred mode for carrying out the present invention. However, this preferred embodiment is only used to explain the present invention, not to limit the present invention. Therefore, the protection scope of the present invention should be determined by the scope described in the claims.

[0019] figure 1 It is a schematic diagram of an electrostatic discharge (Electrostatic discharge, ESD) structure 100 for improving the robustness of a charging device model (Charge Device Model, CDM) according to an embodiment of the present invention. The ESD structure 100 includes at least an input stage 105 . Such as figure 1 As shown, the input stage 105 includes an input pad 110 , a first ESD clamping circuit 121 , a second ESD clamping circuit 122 , a resistor R1 and a transistor MT. The input stage 105 can be coupled to other circuits (eg, the input terminal of an amplifier, but not limited thereto).

[0020] The input pad 110 is configured t...

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Abstract

An ESD (Electrostatic discharge) structure for enhancing robustness of CDM (Charge Device Model) at least includes an input stage. The input stage includes an input pad, a first ESD clamp circuit, a second ESD clamp circuit, a resistor, and a transistor. The input pad is configured to receive an input signal. The first ESD clamp circuit is coupled between the input pad and a work voltage. The second ESD clamp circuit is coupled between the input pad and a ground voltage. The first clamp circuit and the second clamp circuit are capable of bypassing an electrostatic current. The transistor has a first source / drain, a second source / drain, a gate coupled to the input pad, and a bulk coupled through the resistor to the work voltage or the ground voltage.

Description

technical field [0001] The invention relates to an electrostatic discharge (Electrostatic discharge, ESD) structure, in particular to an electrostatic discharge structure for improving the robustness of a charging device model (Charge Device Model, CDM). Background technique [0002] The Charge Device Model (Charge Device Model) is a model that is susceptible to electrostatic discharge damage. This model is an optional form of the Human-Body Model. Devices classified according to the charging device model are charged to a standard voltage level and then tested for their ability to withstand this voltage. If the charging device can withstand the voltage level, the next voltage level is tested, and so on until the charging device cannot withstand it. [0003] In order to improve the robustness of the charging device model, a traditional method is to incorporate a pair of charging device model clamping circuits into an integrated circuit (Integrated Circuit, IC). However, ad...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/60H01L27/02
CPCH02H9/046
Inventor 黄柏狮吴宗翰虞继尧
Owner MEDIATEK INC
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