Bearing substrate and manufacturing method thereof

Abstract

The invention discloses a bearing substrate and a manufacturing method thereof. The bearing substrate comprises a dielectric layer, a first line layer, an insulating layer, a plurality of conductive blocks and a first conductive structure. The dielectric layer has a first surface, a second surface and a plurality of blind holes. The first line layer is internally buried in the first surface, and the blind holes extend to the first line layer from the second surface. The insulating layer is arranged on the first surface and is provided with a third surface, a fourth surface and a plurality of first open holes. The first open holes expose the first line layer, and the diameter of each first open hole increases gradually from the third surface to the fourth surface. The conductive blocks are filled in the conductive blocks and are connected with the first line layer. The first conductive structure comprises a plurality of conductive holes filling to the blind holes and second line layers arranged on a part of the second surface.

Description

technical field [0001] The invention relates to a substrate and a manufacturing method thereof, and in particular to a carrier substrate suitable for carrying components and a manufacturing method thereof. Background technique [0002] In recent years, with the rapid development of electronic technology and the emergence of high-tech electronic industries, electronic products with more humanization and better functions are constantly being introduced, and are designed towards the trend of light, thin, short and small. In these electronic products, a carrier substrate is usually arranged. In addition to having conductive circuits, the carrier substrate can also carry components such as capacitors, inductors, resistors, IC chips or packages as a data processing unit of the electronic products. [0003] However, the connection pads and traces on the existing carrier substrate are on the same level, and the opening of the solder resist layer will simultaneously expose the connec...

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Problems solved by technology

[0003] However, the connection pads and traces on the existing carrier substrate are on the same level, and the opening of the solder mask layer will expose the connection pads and traces in the pre-connection area at the same time

Therefore, in addition to the above-mentioned configuration, it is easy to cause the wiring to oxidize and affect the electrical performance, and the user cannot easily distinguish the connection pad from the wiring, so that it is impossible to accurately connect the component directly to the connection pad.

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