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Ground-referenced single-ended signaling connected graphics processing unit multi-chip module

A technology of graphics processing and signaling interface

Inactive Publication Date: 2014-09-17
NVIDIA CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In many cases, the die area associated with highly integrated GPU devices is well above the feature cost knee (knee), which leads to disproportionate cost inefficiencies associated with making advanced GPU chips

Method used

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  • Ground-referenced single-ended signaling connected graphics processing unit multi-chip module
  • Ground-referenced single-ended signaling connected graphics processing unit multi-chip module
  • Ground-referenced single-ended signaling connected graphics processing unit multi-chip module

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Embodiment Construction

[0035] Techniques are provided for high-speed single-ended signaling between different chips making up a system-on-package device. The ground-referenced drivers deliver pulses with polarities determined by corresponding logic states. The pulses traverse the signal path and are received by a ground-referenced amplifier, which amplifies the pulses for interpretation as conventional logic signals. A set of ground-referenced drivers and ground-referenced amplifiers implement a high-speed interface configured to interconnect different chips making up a system-on-package device. The high speed communication enabled by ground reference signaling advantageously improves the bandwidth between different chips within a system-on-package device, which enables higher performance and higher density systems than provided by conventional signaling techniques .

[0036] Embodiments of the invention implement a system that includes a plurality of different processor chips, one or more memory ...

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PUM

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Abstract

A system of interconnected chips comprising a multi-chip module (MCM) includes a first processor chip, a graphics processing cluster (GPC) chip, and an MCM package configured to include the first processor chip, the GPC chip, and an interconnect circuit. The first processor chip is configured to include a first ground-referenced single-ended signaling interface circuit. A first set of electrical traces fabricated within the MCM package and configured to couple the first single-ended signaling interface circuit to the interconnect circuit. The GPC chip is configured to include a second single-ended signaling interface circuit and to execute shader programs. A second set of electrical traces fabricated within the MCM package and configured to couple the second single-ended signaling interface circuit to the interconnect circuit. In one embodiment, each single-ended signaling interface advantageously implements ground-referenced single-ended signaling.

Description

[0001] Statement of Rights [0002] This application was made with United States Government support under Agreement No. HR0011-10-9-0008 awarded by DARPA. The US Government has certain rights in this invention. This application is a continuation-in-part of U.S. Application Serial No. 13 / 844,570 (Attorney Docket NVIDP811 / SC-13-0072-US1), filed March 15, 2013, the entire contents of which are incorporated by reference Incorporated into this article. technical field [0003] The present invention relates to multiprocessor architectures, and more particularly, to graphics processing unit multichip modules with ground referenced single-ended signaling connections. Background technique [0004] A typical computing system includes a collection of central processing units (CPUs), graphics processing units (GPUs), high capacity memory subsystems, and interface subsystems. In order to achieve the generation-by-generation improvement of system performance, successive generations of...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06T1/00
CPCG06F13/00H01L23/535H03K19/00G06T1/00H01L2224/16145H01L2224/16225H01L2924/15192H01L2924/15311H01L2924/13091G06F13/4072Y02D10/00H01L2924/00
Inventor 威廉·J·达利乔纳·M·阿尔本约翰·W·波尔顿托马斯·黑斯廷斯·格里尔三世
Owner NVIDIA CORP
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