Distance compression operational circuit of imaging processing of synthetic aperture radar

Abstract

The invention relates to a distance compression operational circuit of imaging processing of a synthetic aperture radar. The distance compression operational circuit consists of a programmable logic array chip FPGA, an external memory, an output interface, a FIFO (first in first out) memory and a clock drive circuit, wherein the programmable logic array chip FPGA contains an external memory interface A having a 64 bit architrave and adaptive to an SRAM (static random access memory), a DDR2 external memory interface, a phase-locked loop controller and a host interface. The distance compression operational circuit is characterized in that the external memory interface A having the 64 bit architrave of the programmable logic array chip FPGA is separated into two parts in using functions, a half includes a 32 bit architrave for receiving data from the FIFO memory, and the other half includes a 32 bit architrave for outputting an operational result to an output interface. A circuit structure, a connection mode and a control method are simple, the reliability is high, and thus a requirement for real-time performance of data processing is satisfied.

Description

technical field [0001] The invention relates to remote measurement and remote sensing technology, in particular to a remote measurement and remote sensing information processing technology for Synthetic Aperture Radar (SAR) imaging. Background technique [0002] Synthetic Aperture Radar (SAR) is a high-resolution microwave imaging radar. It is usually installed on an aircraft or satellite to image the ground. The resulting image corresponds to a large object size and a large amount of image data. With the development of modern synthetic aperture radar in the direction of high resolution, high swath, multi-band, multi-polarization, multi-mode, etc., the amount of image data processing continues to increase. In the process of SAR imaging processing, range compression processing is an indispensable one. step, due to its large amount of computation and high computation speed requirements, it is easy to form a bottleneck in digital signal processing, so the distance compression p...

AI Technical Summary

Problems solved by technology

The circuit structure of this set is relatively complex, and the coordination control requirements of the two-way data processing circuits are also relatively high, and the reliability is difficult to guarantee

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