pmos transistor and method of forming the same

Abstract

Provided are a P-channel Metal Oxide Semiconductor (PMOS) transistor and a forming method thereof. The forming method includes forming gate structures on a monocrystalline silicon substrate, wherein the gate structures comprise gate dielectric layers and gate electrodes; forming lightly doped drain structures located on two sides of the gate structures on the substrate; forming first side walls on two sides of the gate structures; forming second side walls on two sides of the gate structures, wherein the first side walls are located between the gate structures and the second side walls; forming sigma-shaped first grooves in the substrate in the areas where the source electrode and the source electrode are pre-formed with the gate structures, the first side walls and the second side walls serving as masks; forming silicon-germanium materials in the first grooves. After the second side walls are arranged on two sides of the gate structures, the distance between the groove tips of the first grooves and the surface of the substrate is increased, little lightly doped drain structures are removed while many lightly doped drain structures are reserved, accordingly the hot electron effect can be effectively overcome and the circuit performance can be improved.

Description

technical field [0001] The invention belongs to the field of semiconductor manufacturing, in particular to a PMOS transistor and a manufacturing method thereof. Background technique [0002] In the existing manufacturing process of semiconductor devices, since stress can change the energy gap and carrier mobility of silicon materials, it has become an increasingly common means to improve the performance of MOS transistors through stress. Specifically, by properly controlling the stress, the mobility of carriers (electrons in NMOS transistors and holes in PMOS transistors) can be increased, thereby increasing the driving current, thereby greatly improving the performance of MOS transistors. For PMOS transistors, embedded silicon germanium technology (Embedded SiGe Technology) can be used to generate compressive stress in the channel region of the transistor, thereby improving carrier mobility. The so-called embedded silicon germanium technology refers to embedding silicon ge...

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Problems solved by technology

[0008] combine figure 1 , figure 2 and image 3 As shown, when the tip depth H is small, figure 1 The lightly doped drain structure 5 will be removed a lot, so that the PMOS transistor cannot effectively overcome the hot electron effect, which affects the performance of the circuit

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