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CMP (Chemical mechanical polishing) simulation method

A simulation method and chemical-mechanical technology, applied in the field of chemical-mechanical polishing simulation, can solve problems such as affecting the accuracy of CMP simulation, worsening prediction effect, and reducing simulation accuracy.

Active Publication Date: 2013-10-23
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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Problems solved by technology

[0008] 3. The selection of the starting point of division will lead to different CMP simulation results
[0009] On the one hand, these shortcomings increase the difficulty of the CMP simulation process, such as how to calculate the metal disc shape of the interconnection when the same interconnection is divided into different windows? In addition, it also affects the accuracy of CMP simulation. For example, for interconnect lines in the same window, different line widths should have different metal disc shapes. If they are all given the same metal disc shape, the simulation accuracy will inevitably be reduced and the prediction effect will be changed. Difference

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Embodiment Construction

[0054] In the CMP simulation process, layout division is a very important step. All subsequent simulation processes are based on the divided panes. Different division methods lead to different CMP simulation results. The existing layout division method is a fixed division method, which will reduce the simulation accuracy and deteriorate the prediction effect. The present invention provides a partitioning method adapted to different interconnecting line structures in the layout, that is, a method for dividing panes according to the distribution of interconnecting lines in the layout.

[0055] In order to make the above objects, features and beneficial effects of the present invention clearer, the specific implementation of the chemical mechanical polishing simulation method of the present invention will be described in detail below with reference to the accompanying drawings.

[0056] In the following description, a lot of specific details are set forth in order to fully unders...

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Abstract

The invention provides a CMP (chemical mechanical polishing) simulation method, which comprises the following steps that any one interconnecting wire in an integrated circuit layout is selected as a study object; the study object is used as a reference, one planarization length respectively extends in at least four directions of the study object in the local plane of the integrated circuit layout, and dividing panes of the study object are formed; characteristic parameters of layout structures in the dividing panes of the study object are extracted, and the characteristic parameters at least comprise two of equivalent density, equivalent line width and equivalent gap; a CMP mold is adopted for carrying out CMP simulation according to the characteristic parameters; and metal dish-shaped and / or medium erosion simulation results of the study object are obtained. The simulation method has the advantages that the CMP simulation process is more accurate, and the physical and chemical mechanism of the CMP is better met, so the more precise chip surface topography after the CMP simulation can be obtained, and the qualified rate and the performance prediction accuracy of the chip are ensured.

Description

technical field [0001] The invention relates to integrated circuit manufacturing and electronic design automation technology, in particular to a chemical mechanical polishing simulation method. Background technique [0002] In the manufacturing process of integrated circuits, the surface flatness of metal layers affects the depth of focus required in lithography and the stress distribution of interconnect structures. In order to obtain the flatness necessary for the manufacture of multilayer circuits, a chemical mechanical polishing (CMP) process is usually used to planarize the topography of the metal dielectric layer. [0003] The surface topography after the CMP process depends on the layout features. Due to the different removal rates of different materials due to the selection of polishing fluid in the CMP process, the surface of the chip is not completely flat during and after CMP, but has topological fluctuations, which are often used to describe the concept of surfa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50G06F9/455
Inventor 马天宇陈岚孙艳
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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