P-type OTP (one time programmable) device and preparing method therefore

Abstract

The invention discloses a P-type OTP (one time programmable) device. A channel region of a second PMOS (P-channel metal oxide semiconductor) transistor is provided with one N-type threshold voltage injection region more than a channel region of a first PMOS transistor, and the threshold voltage injection region is used for increasing absolute value of threshold voltage of the second PMOS transistor. The invention also discloses a preparing method for the P-type OTP device. The preparing method comprises the following steps: performing N-type ion implantation on the channel region of the second PMOS transistor by increasing a mask to form the threshold voltage injection region. According to the P-type OTP device and preparing method provided by the invention, threshold voltage of the second PMOS transistor can be increased, programmable performance of the P-type OTP device can be greatly improved, conducted current of the whole device can be improved after programming, distinguishable current range before and after programming can be increased for the device, and area of peripheral circuit for realizing OTP functions can be decreased.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuit manufacturing, in particular to a P-type OTP device, and also relates to a manufacturing method of the P-type OTP device. Background technique [0002] Such as figure 1 As shown, it is a schematic diagram of the structure of the existing P-type OTP device. An N-type well 15 is formed on the silicon substrate 10. It is a one-time programmable device formed by connecting two PMOS transistors 11 and 12 in series. The first PMOS transistor 11 serves as The gate transistor of the OTP device, and the second PMOS transistor 12 is used as the storage unit of the OTP device. [0003] The source of the first PMOS transistor 11 includes a P-type diffusion region 191 and a P-type lightly doped region 19 formed in the N well, and the drain of the first PMOS transistor 11 includes a P-type diffused region 191 formed in the N well. A P-type diffusion region 192 and a P-type lightly doped region ...

AI Technical Summary

Problems solved by technology

This will consume a lot of OTP peripheral circuit area

Although the unit area of ​​each P-type OTP device is very small, more peripheral circuits limit the application of this type of device to applications that require high-density capacity

[0007] like Figure 4 As shown, it is the working curve before and after programming of the existing P-type OTP device with 1V substrate bias voltage; the distinguishable current range of the device before and after programming becomes larger, but the current value before and after programming becomes smaller

When the substrate voltage is too high, the reading current will be too low, and the reading circuit cannot read the current of the programmed OTP unit; if the substrate voltage is too low, the initial current of the OTP unit before programming is too large, and it cannot be distinguished Status of the OTP unit

Therefore, it usually requires a very complicated peripheral reading circuit to provide two accurate voltages to the substrate and the source at the same time, which consumes a large chip area at the same time.

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