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Weight adjustment circuit for variable-resistance synapses

A weight adjustment, circuit technology, applied in the field of integrated circuits and neural networks, to achieve the effect of a simple structure

Inactive Publication Date: 2012-07-25
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] Since the resistive synapse is a new type of synaptic structure recently proposed, there are few weight adjustment circuits for resistive synapse. At present, most of the synaptic weight adjustment circuits are aimed at the complex MOS structure synapse. touching

Method used

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  • Weight adjustment circuit for variable-resistance synapses
  • Weight adjustment circuit for variable-resistance synapses
  • Weight adjustment circuit for variable-resistance synapses

Examples

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Embodiment Construction

[0025] Attached below image 3 And attached Figure 4 , the present invention will be further described in detail through specific embodiments.

[0026] Such as image 3 As shown, the synaptic weight adjustment circuit is composed of a weight enhancement adjustment (LTP adjustment) sub-circuit A and a weight suppression adjustment (LTD adjustment) sub-circuit B. The two sub-circuits have the same structure, but the connected signals are opposite.

[0027] Both sub-circuits are composed of charging stage, discharging stage, charge storage and output stage, the charging stage is connected with the charge storage stage, and the charge storage stage is connected with the charging stage, discharging stage and output stage.

[0028] The charging stage is composed of PMOS charging tube MP1 (MP2), inverter I5 (I7), and NAND gate I6 (I8), which are used to charge the charge storage stage. The input terminal of the inverter I5 in the LTP subcircuit is connected to the state node SD of ...

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Abstract

The invention discloses a weight adjustment circuit for variable-resistance synapses, which relates to the fields of integrated circuits and neural networks, and is used for carrying out weight adjustment on variable-resistance synapses. The circuit is composed of a weight enhancement adjustment subcircuit A (LTP (long term potentiation) adjustment) and a weight inhibition adjustment subcircuit B (LTD (long term depression) adjustment), wherein the two subcircuits respectively contain a charging pole, a discharging pole, a charge storage pole and an output pole. The core of the circuit is implemented by using an analog circuit mode, therefore, the number of transistors required by the circuit is greatly reduced; and meanwhile, through the setting of the bias voltage on a discharge tube in the discharge pole, the size of a weight adjustment time window can be adjusted conveniently. The circuit disclosed by the invention follows an STDP (spike timing dependent plasticity) learning rule, and LTP and LTD pulse outputs are generated according to the activities of nerve units at the two ends of the variable-resistance synapses so as to carry out corresponding weight adjustment on the variable-resistance synapses. The circuit disclosed by the invention is simple in structure, convenient in parameter adjustment, and suitable for applications, such as weight adjustment on electronic synapses of a large-scale neural network, and the like.

Description

technical field [0001] The invention relates to the field of integrated circuits and neural networks, and proposes a resistive variable synapse weight adjustment circuit, which is used for performing STDP weight adjustment operations on resistive variable electronic synapses. technical background [0002] As digital computers encountered insurmountable difficulties in fuzzy pattern recognition, associative memory, and self-learning, neural network computing received renewed attention. [0003] The neural network circuit simulates the human neural network in the form of a circuit to realize functions similar to human brain fuzzy pattern recognition, associative memory and self-learning. Such as figure 1 Shown is a schematic diagram of the connection between two adjacent neurons in the human neural network. Human neurons are mainly composed of cell bodies, dendrites and axons. The dendrites can receive the stimulation of the previous neuron. The cell body processes the recei...

Claims

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Application Information

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IPC IPC(8): G11C11/56
Inventor 刘洋吴洪天于奇胡绍刚
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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