Weight adjustment circuit for variable-resistance synapses
A weight adjustment, circuit technology, applied in the field of integrated circuits and neural networks, to achieve the effect of a simple structure
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[0025] Attached below image 3 And attached Figure 4 , the present invention will be further described in detail through specific embodiments.
[0026] Such as image 3 As shown, the synaptic weight adjustment circuit is composed of a weight enhancement adjustment (LTP adjustment) sub-circuit A and a weight suppression adjustment (LTD adjustment) sub-circuit B. The two sub-circuits have the same structure, but the connected signals are opposite.
[0027] Both sub-circuits are composed of charging stage, discharging stage, charge storage and output stage, the charging stage is connected with the charge storage stage, and the charge storage stage is connected with the charging stage, discharging stage and output stage.
[0028] The charging stage is composed of PMOS charging tube MP1 (MP2), inverter I5 (I7), and NAND gate I6 (I8), which are used to charge the charge storage stage. The input terminal of the inverter I5 in the LTP subcircuit is connected to the state node SD of ...
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