Chip register information management method

Abstract

The invention provides a chip register information management method, which includes the steps: 1, according to different IP (intellectual property) cores forming an SOC (system on chip), inputting register information relevant to each IP core so as to form an IP attribute file; 2, acquiring a corresponding base address value of each IP core from an SOC framework and modifying the IP core base address value in each IP attribute file according to the SOC framework so that a chip attribute file is formed; 3, forming a corresponding register file according to the relevant register information of each IP core required by an integration and verification phase designed by the SOC framework; 4, forming a corresponding head file according to the relevant register information of each IP core required by a system verification phase in an SOC framework design process; and 5, forming a corresponding form document according to the relevant register information of each IP core required by a chip manual description stage in the SOC framework design process. The chip register information management method relieves complicated work of repeatedly and manually inputting various information of a register for technicians, so that work efficiency is improved.

Description

【Technical field】 [0001] The invention relates to the field of SOC design, in particular to a chip register information management method. 【Background technique】 [0002] SOC is a chip design method, which is called a system on a chip, which integrates microprocessors, memories, high-density logic circuits, analog and hybrid circuits, and other circuits into one chip to form a system with signal acquisition, conversion, storage and A system with I / O processing functions. SOC is not a comprehensive technology of distributed systems based on functional circuits, but a system module and circuit synthesis technology based on functional IP cores. The construction of IP core is the most important feature of SOC, and the embedded system is the basic structure of SOC. IP core refers to some circuit functional modules that have been designed and verified in practice with specific functional performance optimization. It generally includes three levels of meaning: first, the IP core...

AI Technical Summary

Problems solved by technology

[0004] The existing situation is that the register information related to the IP core is not well organized. At different stages of the SOC design, the register information related to the IP core must be configured, that is, the information of the register must be re-entered manually, which is time-consuming and expensive. Laborious and error-prone

And in different SOC designs, even if the same circuit function modules that make up the SOC are used, it is difficult to effectively multiplex the register information related to the IP core

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