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Manufacturing method of semiconductor device

A manufacturing method and semiconductor technology, applied in the direction of semiconductor/solid-state device manufacturing, semiconductor devices, manufacturing tools, etc., can solve the unavoidable problems of semiconductor device manufacturing cost, increase, cost increase, etc., and achieve the suppression of voids and poor connections Effect

Inactive Publication Date: 2014-12-10
TOSHIBA MEMORY CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In this method, since the steps from removal of the oxide film on the surface of the solder bump to melting of the solder bump are performed in a vacuum chamber, an increase in the manufacturing cost of the semiconductor device cannot be avoided.
In addition, since the conventional flip-chip connection cannot be used for alignment, pads made of solder are used for alignment, resulting in cost increases and design restrictions.

Method used

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  • Manufacturing method of semiconductor device
  • Manufacturing method of semiconductor device
  • Manufacturing method of semiconductor device

Examples

Experimental program
Comparison scheme
Effect test

no. 1 Embodiment approach

[0026] Figure 1 ~ Figure 4 It is a diagram showing the manufacturing process of the semiconductor device of the first embodiment. The first embodiment is a method of manufacturing a semiconductor device using flip chip connection without using flux. Such as figure 1 As shown, a first substrate 2 having first solder bumps 1 and a second substrate 4 having second solder bumps 3 are prepared. The first substrate 2 is sucked and held on the tool 5, for example. The second substrate 4 is arranged on the stage 6. From figure 1 The alignment process shown to image 3 The temporary connection process shown is implemented using a flip chip bonder having an alignment mechanism, a heating mechanism, and a height restriction mechanism.

[0027] The first substrate 2 and the second substrate 4 are, for example, semiconductor chips (silicon (Si) chips, etc.) or interposer chips (silicon (Si) interposers, etc.). The combination of the first substrate 2 and the second substrate 4 is, for exa...

no. 2 Embodiment approach

[0043] Figure 6 ~ Figure 9 It is a diagram showing the manufacturing process of the semiconductor device of the second embodiment. In the manufacturing process of the semiconductor device of the second embodiment, first, according to the same method as in the first embodiment, a first substrate 2 having first solder bumps 1 and a second substrate having second solder bumps 3 are prepared 4, such as Image 6 As shown, the first solder bump 1 and the second solder bump 3 are aligned. The specific examples of the substrates 2 and 4, the constituent materials of the solder bumps 1, 3, the alignment method of the solder bumps 1, 3, etc. are the same as those in the first embodiment. In addition, from Image 6 The alignment process shown to Picture 8 The temporary connection process shown is implemented using a flip chip bonder having an alignment mechanism, a pressure mechanism, a heating mechanism, an ultrasonic generating mechanism, and the like.

[0044] Then, like Figure 7 As...

Embodiment 1

[0052] First, a first semiconductor chip on which a solder bump composed of Sn-0.7% by mass Cu is formed on an electrode terminal by a plating method, and a second semiconductor chip on the connected side where the first solder bump is mounted are prepared. A solder bump composed of Sn-0.7% by mass Cu is formed on the electrode terminal of the second semiconductor chip as in the first semiconductor chip 1. The electrode terminals of the first semiconductor chip and the electrode terminals of the second semiconductor chip are arranged at corresponding predetermined positions so that they can be connected to each other. The number of terminals is approximately 2000, the height of the solder bumps is 20 μm, and the minimum distance between adjacent terminals is 60 μm. No flux is used.

[0053] For these semiconductor chips, a flip chip bonder equipped with an alignment mechanism, a heating mechanism, a pressing mechanism, and a tool height control mechanism is used to make the firs...

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Abstract

The embodiment of the invention discloses a manufacturing method of a semiconductor device. The method comprises the following steps of: aligning and contacting a first solder bump and a second solder bump, and heating to a temperature above the melting points of the solder bumps till the solder bumps are molten to form a temporary connector for the first solder bump and the second solder bump; and heating the cooled temporary connector to a temperature above the melting points of the solder bumps in a reducing atmosphere, removing an oxide film existing on the surface of the temporary connector, and melting the temporary connector simultaneously to form a formal connector.

Description

Technical field [0001] The present invention generally relates to a method of manufacturing a semiconductor device and a semiconductor device. Background technique [0002] In order to cope with the multi-pin, fine-pitch, and high-speed signal speed of semiconductor chips, semiconductor devices using flip-chip connections as wiring and assembly methods with short connection lengths have been used. When flip-chip connection is used as a connection between semiconductor chips or a connection between a semiconductor chip and a silicon interposer (interposer), solder bumps are formed on the electrode terminals of the upper and lower chips (semiconductor chip or silicon interposer), respectively, After these solder bumps are aligned and stacked to face each other, the solder bumps are heated and melted for connection. [0003] Generally, in order to remove the oxide film on the surface of the solder bump, the following steps are used. First, after applying flux on the surface of the s...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/50H01L21/60B23K1/00
CPCH01L24/75H01L24/81
Inventor 青木秀夫福田昌利泽田佳奈子小盐康弘
Owner TOSHIBA MEMORY CORP
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