Vertical parasitic PNP (plug-and-play) triode in BiCMOS (bipolar complementary metal oxide semiconductor) process and manufacturing method
A PNP triode and vertical parasitic technology, which is applied in semiconductor/solid-state device manufacturing, transistors, electrical components, etc., can solve the problems of large device area, large collector connection resistance, device size reduction, etc., and achieve large current amplification factor and reduce Resistor, the effect of increasing the current gain
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[0045] like figure 1 Shown is a schematic structural view of the vertical parasitic PNP transistor in the BiCMOS process of the embodiment of the present invention. The vertical parasitic PNP transistor in the BiCMOS process of the embodiment of the present invention is formed on a P-type silicon substrate 1 and placed on the P-type silicon substrate 1. An N-type deep well 2 is formed on a silicon substrate 1, and the active region is isolated by a shallow trench field oxygen 3, which is shallow trench isolation (STI). The vertical parasitic PNP transistor includes:
[0046] A collector region, a P-type ion implantation region 7 is formed in each of the active regions, and the depth of the P-type ion implantation region 7 in each of the active regions is greater than or equal to the depth of the bottom of the shallow groove field oxygen 3 and connected to each other, the collector region is composed of a P-type ion implantation region 7 formed in the first active region. The ...
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