Digital shunt system

Abstract

A digital shunt system comprises an input signal partition cache module, a circular read and write control module, a circular judging sequence adjusting module, a weighted multiplier module, a time sequence synchronizing module, a multi-stage splicing-adding module, a distributed filter module, a position sequence arranging and computing module, a ping-pang cache module, a sequence FFT (fast Fourier transform) module and a snapshot output cache module. Weighted splicing operation is carried out in digital shunting of the digital shunt system by the circular judging method, the integral process is controlled by a clock and utilizes the circular judging structure, the output part is processed by FFT and is output in a frequency division and snapshot manner, time sequence is reinforced by the design, resource consumption is lower and signal processing is smoother.

Description

technical field [0001] The invention relates to a branching system, in particular to a digital branching system based on a loop decision structure. Background technique [0002] In the traditional digital shunting method, the input data of the data interface module adopts the traditional mode of writing first and then reading, that is, directly using a dual-port RAM with a depth of the total filter order H to store the input signal, and then the input H The signal is filtered. Since the order of each sampling is limited, and it is necessary to complete the digital branching operation on the H signals that have been sampled before the H+1 signals come, and because the filter needs to be multiplied and added by the filter order H times, according to this method The achieved multiplication and acceleration rate is very high, especially when the order of the filter is high, the system resources will reach hundreds of megahertz or even higher, which will reduce the reliability a...

AI Technical Summary

Problems solved by technology

Since the order of each sampling is limited, and it is necessary to complete the digital branching operation on the H signals that have been sampled before the H+1 signals come, and because the filter needs to be multiplied and added by the filter order H times, according to this method The achieved multiplication and acceleration rate is very high, especially when the order of the filter is high, the system resources will reach hundreds of megahertz or even higher, which will reduce the reliability and realizability of the system design; The improved digital branch based on the pipeline structure on the basis of the channel also needs to generate the input buffer with the total order length H of the filter. Because it performs clock-controlled pipeline processing through the sampling window, the sampling clock and processing clock of the input signal are reduced, but In this method, the resource consumption of weighting operation and sequence adjustment is huge. For the case of high-order filtering and large-capacity multi-channel branching, the resource consumption is very large, and the power consumption of the system increases, which cannot meet the increasing performance requirements of digital branching.

In addition, this method does not parameterize the digital shunt design, which makes it difficult to modify the design for new requirements and is difficult to apply

Images