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Pretreatment method for SiGe selective epitaxial growth

An epitaxial growth and selective technology, which is applied in the fields of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of reducing the critical dimension of sidewalls, affecting the performance of key devices, etching silicon nitride sidewalls, etc., and achieving improved strain effect, improve quality, simple and easy process

Inactive Publication Date: 2012-06-13
SHANGHAI HUALI MICROELECTRONICS CORP
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Problems solved by technology

[0018] see Figure 1D , therefore, using this pretreatment method, the silicon nitride sidewall will be etched, which in turn will cause a reduction in the critical dimension (CD) of the sidewall, which will affect the performance of some subsequent key devices
[0019] In summary, it is very important to perform pretreatment before the growth of SiGe by selective epitaxial technology, and it is necessary to find a solution to eliminate the etching of side walls by plasma in the current pretreatment process and the influence on the growth quality of SiGe thin films. There are still problems in the actual implementation process, and it is urgent to introduce new methods that can effectively improve the above defects, so as to solve a series of problems such as how to improve the short channel effect when strain engineering technology is used in the semiconductor integration process.

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  • Pretreatment method for SiGe selective epitaxial growth
  • Pretreatment method for SiGe selective epitaxial growth
  • Pretreatment method for SiGe selective epitaxial growth

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Embodiment Construction

[0026] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0027] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, the present invention can be implemented in many other ways different from those described here, and those skilled in the art can make similar extensions without violating the connotation of the present invention, so the present invention is not limited by the specific implementations disclosed below.

[0028] Secondly, the present invention is described in detail using schematic diagrams. When describing the embodiments of the present invention in detail, for the convenience of explanation, the cross-sectional view showing the device structure will not be partially enlarged accordi...

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Abstract

The invention provides a pretreatment method for SiGe selective epitaxial growth. The method comprises the following steps that: hydrogen plasma is introduced into a device in a reaction cavity; chemical reaction is carried out on a native oxide on the device and the hydrogen plasma and then steam is generated and is volatilized; and SiGe selective epitaxial growth is carried out on source / drain regions of the device. According to the above-mentioned technical scheme, etching on a side wall by the plasma during the pretreatment process can be avoided, so that the quality of SiGe film growth can be improved.

Description

technical field [0001] The invention belongs to the field of semiconductor integrated circuit manufacturing, and in particular relates to a pretreatment method before selective epitaxial growth of germanium and silicon, so as to avoid etching of side walls by plasma during the pretreatment process and improve the growth quality of germanium and silicon thin films. Background technique [0002] As the integration process technology enters the deep submicron process conditions, the conventional shrinking method encounters a series of problems centered on the short channel effect. For example, when the device is further scaled, the improvement of the mobility becomes the key to maintain the performance of the transistor as the current density increases. In recent years, since strain engineering technology (Strain Engineering) can be used in 45nm and below processes, by introducing local unidirectional tensile or compressive stress into the channel of MOSFET in the source / drain ...

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Application Information

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IPC IPC(8): H01L21/336H01L21/20
Inventor 张文广郑春生徐强陈玉文
Owner SHANGHAI HUALI MICROELECTRONICS CORP
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