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Method and system for reading information of storage array unit

A technology for storing array and unit information, which is applied in the field of information storage and can solve the problem of low accuracy of reading method of storage array unit information

Inactive Publication Date: 2012-04-18
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] The invention solves the problem of low accuracy of the existing memory array unit information reading method

Method used

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  • Method and system for reading information of storage array unit
  • Method and system for reading information of storage array unit
  • Method and system for reading information of storage array unit

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Embodiment Construction

[0028] In order to make the above objectives, features and advantages of the present invention more obvious and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0029] In the following description, many specific details are set forth in order to fully understand the present invention, but the present invention can also be implemented in other ways different from those described herein, so the present invention is not limited by the specific embodiments disclosed below.

[0030] Secondly, the present invention will be described in detail with reference to schematic diagrams. When describing the embodiments of the present invention in detail, the schematic diagrams are only examples, which should not limit the scope of protection of the present invention.

[0031] As described in the background art, the conventional method for reading information in a memory array is to apply a low voltage ...

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Abstract

The invention provides a method and a system for reading information of a storage array unit. The method comprises the following steps of: simultaneously gating a plurality of continuous bit lines comprising a bit line of a read unit, applying first reading voltage to one bit line of a read storage unit, applying second reading voltage to at least one continuous bit line which comprises the other bit line of the read storage unit, wherein the second reading voltage is higher than the first reading voltage, and applying voltage which is equal to the second reading voltage to a bit line which is adjacent to the bit line of the second reading voltage. Potential difference does not exist at two ends of each of a plurality of storage units which are adjacent to a bit line, which has high voltage, of the read storage unit, so time required by charging to the second reading voltage by the bit line of the read storage unit is not prolonged, and the reading accuracy of the read storage unit can be guaranteed.

Description

Technical field [0001] The invention relates to the field of information storage, in particular to a method and system for reading information of storage array units. Background technique [0002] The core of the entire flash memory is an array of storage cells. For the reading method of the storage cell information in the array, see figure 1 , The memory cell takes the ordinary MOS tube as an example. Each cell has three ports, one of which is the control port, which is equivalent to the gate of the ordinary MOS tube, and the other two ports are equivalent to the source and drain of the ordinary MOS tube. pole. The control port of the memory cell is connected to the word line, and the control port of the memory cell in the same row in the array is connected to the same word line WL1, and the word line potential is high or low to realize the turning on and off of the memory cell. The sources and drains of the memory cells in the same row of the memory array are connected end to ...

Claims

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Application Information

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IPC IPC(8): G11C7/12
Inventor 龙爽陈岚陈巍巍杨诗洋崔雅洁
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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