3D integrated circuit and its manufacturing method

Abstract

The invention provides a 3D (three-dimensional) IC (integrated circuit) and a manufacturing method thereof. The circuit comprises a semiconductor substrate, a semiconductor device, a silicon through hole, an interconnection structure and a diffusion trapping region, wherein the semiconductor device is formed on the upper surface of the semiconductor substrate; the silicon through hole penetrates through the semiconductor substrate and comprises an insulating layer for covering the side walls of the silicon through hole and a conducting material filled in the insulating layer; the interconnection structure is used for connecting the semiconductor device with the silicon through hole; and the diffusion trapping region is formed on the lower surface of the semiconductor substrate. The manufacturing method is applicable to manufacturing of 3D integrated circuits.

Description

technical field [0001] The invention relates to the field of integrated circuit manufacturing, in particular to an integrated circuit with a diffusion trap layer and a manufacturing method thereof. Background technique [0002] In the manufacturing process of integrated circuits, metal ions such as Cu, Fe, and Na ions from through-silicon vias (through-Si-via, TSV), interconnect structures, or metal electrodes of semiconductor devices can easily diffuse into transistor structures and In the interconnection structure, the performance of the integrated circuit is degraded, or even malfunctioned. [0003] The method of directly implanting ions into the integrated circuit structure can be used to trap metal ions, but the implanted ions may enter areas other than the target area, especially may cause defects and damage to the dielectric layer and through-silicon holes in the integrated circuit. . Contents of the invention [0004] In order to solve the above problems, accordi...

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Problems solved by technology

[0002] In the manufacturing process of integrated circuits, metal ions such as Cu, Fe, and Na ions from through-silicon vias (through-Si-via, TSV), interconnect structures, or metal electrodes of semiconductor devices can easily diffuse into transistor structures and interconnect structure, resulting in degradation of integrated circuit performance, or even failure

[0003] The method of directly implanting ions into the integrated circuit structure can be used to trap metal ions, but the implanted ions may enter areas other than the target area, especially may cause defects and damage to the dielectric layer and through-silicon holes in the integrated circuit.

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