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Semiconductor package part and manufacturing method thereof

A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve the problem of reducing the structural strength of the second semiconductor package 20 and the size of the second semiconductor package 20 cannot be reduced And other issues

Inactive Publication Date: 2011-10-05
ADVANCED SEMICON ENG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, since the via hole 16 penetrates through the encapsulant 12 of the second semiconductor package 20 , the structural strength of the second semiconductor package 20 is reduced.
Moreover, since the via hole 16 reduces the structural strength of the second semiconductor package 20, the thickness between the via hole 16 and the outer surface 24 of the sealant 12 needs to be thicker to ensure the structural strength of the second semiconductor package 20, As a result, the size of the second semiconductor package 20 cannot be reduced

Method used

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  • Semiconductor package part and manufacturing method thereof
  • Semiconductor package part and manufacturing method thereof
  • Semiconductor package part and manufacturing method thereof

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Embodiment Construction

[0065] The following preferred embodiments are proposed as an illustration of the present invention, but the content of the embodiments is only for illustration purposes, and the drawn drawings are for illustration purposes, and are not used to limit the protection scope of the present invention. Furthermore, the illustrations of the embodiments also omit unnecessary components to clearly show the technical characteristics of the present invention.

[0066] Please refer to figure 2 , which shows a cross-sectional view of the semiconductor package according to the first embodiment of the present invention. The semiconductor package 100 is a stacked semiconductor package, which includes a chip assembly 102, a metal bonding wire 104, a sealant 106, a conductive portion 108, a first dielectric layer 110, a second dielectric layer 116, A patterned conductive layer 112 and a semiconductor device 114 . The semiconductor component 114 here is, for example, a chip or another semicon...

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Abstract

The invention discloses a semiconductor package part and a manufacturing method thereof. The semiconductor package part comprises a chip assembly, a sealing wax, a metal weld line, a conducting part, a dielectric layer and a patterned conducting layer; the chip assembly comprises a first connecting pad and a second connecting pad which are oppositely configured; the sealing wax covers the chip assembly and the metal weld line and has a sealing wax surface; a part of the metal weld line and the first connecting pad are exposed out of the sealing wax surface; the conducting part is formed on the sealing wax and at least one part of the conducting part is exposed out from a first sealing wax surface; the dielectric layer is formed on the first sealing wax surface and has a conducting part hole exposed out of the conducting part; the patterned conducting layer is formed on the conducting layer and a part of the patterned conducting layer is formed in the conducting part hole so as to be electrically connected the conducting part; and the metal weld line is electrically connected with the conducting part and the second connecting pad.

Description

technical field [0001] The present invention relates to a semiconductor package and its manufacturing method, and in particular to a semiconductor package using wire bonding technology to form metal solder wire balls and its manufacturing method. Background technique [0002] Please refer to figure 1 (Known technology), which shows a cross-sectional view of a conventional stacked semiconductor structure. A conventional stacked semiconductor structure 10 is formed by stacking a first semiconductor package 14 and a second semiconductor package 20 . The first semiconductor package 14 and the second semiconductor package 20 are electrically connected by solder balls 22 . [0003] The second semiconductor package 20 has a via hole 16 , and the second semiconductor package 20 is electrically connected to the solder balls 18 of the first semiconductor package 14 and the second semiconductor package 20 through the via hole 16 . [0004] However, since the via hole 16 penetrates t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L25/00H01L23/49H01L23/31H01L21/50H01L21/60H01L21/56
CPCH01L2924/01079H01L2924/01013H01L2224/85001H01L2924/014H01L2224/48227H01L24/48H01L2924/1815H01L2224/73265H01L2924/01046H01L2924/0105H01L24/82H01L2224/48091H01L2224/484H01L2224/32145H01L2924/01028H01L2924/01033H01L24/73H01L2924/181H01L2224/48H01L2924/00014H01L2924/00012
Inventor 翁承谊
Owner ADVANCED SEMICON ENG INC
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