Semiconductor structure and forming method thereof

Abstract

The invention provides a semiconductor structure which comprises a first semiconductor material substrate, a first porous structure layer formed on the top layer of the first semiconductor material substrate, a second porous structure layer formed on the first porous structure layer, a graphical structure layer formed on the second porous structure layer and a second semiconductor material layer formed on the graphical structure layer, wherein the porosity and aperture of the second porous structure layer are both less than the porosity and aperture of the first porous structure layer. The thermal mismatch stress of Si material and epitaxial material can be released through the porous structure layer, the problems of cracking of an epitaxial film under relatively large thickness and the like are prevented, and the quality of the epitaxial film crystal is improved. According to the invention, a large-thickness epitaxial material layer (such as GaN and the like) in relatively large thermal mismatch stress with the Si material can be extended on the Si substrate, and the porous Si material can be removed in subsequent processes, thereby avoiding influence on the subsequent device processes.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing and design, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] In recent years, light emitting diodes (light emitting diodes, LEDs) have been widely used in display screens, backlight sources, special lighting, and other fields due to their long life, high luminous efficiency, small size, durability, and rich colors. The core of the LED is the LED epitaxial wafer, and its main structure includes: a substrate, a buffer layer, an N-type semiconductor layer, an active region light-emitting layer, an electron blocking layer, and a P-type semiconductor layer. As the core of the LED epitaxial wafer, the light-emitting layer in the active area is between the N-type semiconductor layer and the P-type semiconductor layer, so that the interface between the P-type semiconductor layer and the N-type semiconductor layer forms a PN junction...

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Problems solved by technology

[0003] However, there is a large lattice mismatch and thermal stress mismatch between Si and these III-V materials. The lattice mismatch causes dislocations, and the thermal stress mismatch will cause film cracks (Crack) when the epitaxial thickness is large. , the quality of the epitaxial film is not good, so the thickness of the film is limited

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