Array substrate and manufacturing method thereof

A technology for array substrates and manufacturing methods, applied in the field of liquid crystal displays, can solve problems such as complex production of array substrates, achieve the effects of reducing production costs and improving production efficiency

Inactive Publication Date: 2011-04-27
BEIJING BOE OPTOELECTRONCIS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Among them, the fabrication of the array substrate is the most complicated

Method used

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  • Array substrate and manufacturing method thereof
  • Array substrate and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0035] figure 1 It is a flow chart of an array substrate manufacturing method provided in Embodiment 1 of the present invention, and the method includes the following steps:

[0036] Step 100. Through a patterning process, a pattern including data lines, gate scan lines and gate electrodes intersecting horizontally and vertically is formed on the base substrate, and the data lines are intermittently arranged so as to be spaced from the gate scan lines, or the gate scan lines are Discontinuously set so as to be spaced from the data line;

[0037] Step 200, through a patterning process, form the pattern of the active layer and the pattern of the gate insulating layer including the bridging via hole and the source electrode via hole on the base substrate on which the above pattern is formed, and the position of the bridging via hole corresponds to intermittent And the position of the adjacent data line or gate scanning line, the position of the source electrode via hole correspo...

Embodiment 2

[0048] figure 2 It is a flow chart of the array substrate manufacturing method provided by Embodiment 2 of the present invention. This embodiment can be based on Embodiment 1, and the specific process is as follows:

[0049] In step 100, a pattern including data lines 2 , gate scan lines 3 and gate electrodes 4 that intersect horizontally and vertically on the base substrate 1 is formed through a patterning process, specifically including:

[0050] Step 110 , depositing a metal thin film on the base substrate 1 . Specifically, this step can be as follows: use a transparent glass substrate or quartz as the base substrate 1, and deposit a layer with a thickness of 500-4000 angstroms on the base substrate 1 by sputtering or thermal evaporation. The material of the metal film can be any one of chromium (Cr), tungsten (W), titanium (Ti), tantalum (Ta), molybdenum (Mo), aluminum (Al) and copper (Cu) or A multilayer metal thin film composed of multiple metals may also be an allo...

Embodiment 3

[0081] Figure 9 The flow chart of the array substrate manufacturing method provided by the third embodiment of the present invention, this embodiment may be based on the first embodiment, including the following process:

[0082] Step 110, depositing a film with a thickness of 500-4000 angstroms on the base substrate 1 by sputtering or thermal evaporation metal film;

[0083] Step 120, coating photoresist on the metal film;

[0084] Step 130, using a common mask to expose and develop the photoresist to form a pattern including a completely reserved area and a completely removed area;

[0085]Step 140: Etching the metal thin film, etching away the metal thin film corresponding to the completely removed area, forming a pattern including at least the data line 2, the gate scan line 3 and the gate electrode 4, or forming the data line interface area 14 and the gate electrode 4 at the same time. The pattern of the scan line interface area 15 . In this embodiment, the formatio...

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PUM

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Abstract

The invention relates to an array substrate and a manufacturing method thereof. The method comprises the following steps of: forming data lines, gate scan lines and gate electrodes through a graph process, wherein the data lines or the gate scan lines are intermittently arranged; forming active layers, jumper via holes and source electrode via holes through the graph process; and forming patterns comprising pixel electrodes, source electrodes, drain electrodes and jumper lines through the graph process, wherein the patterns of the pixel electrodes and the drain electrodes are integrally formed, the source electrodes are connected with the data lines through the source electrode via holes, and the jumper lines are connected with the intermittent and adjacent data lines or gate scan lines through the jumper via holes. By adopting the technical means of forming the data lines and the gate scan lines on the same layer, the array substrate can be prepared by a three-time photoetching process at least, the production efficiency is improved and the production cost is reduced.

Description

technical field [0001] The invention relates to liquid crystal display technology, in particular to an array substrate and a manufacturing method thereof. Background technique [0002] Liquid Crystal Display (hereinafter referred to as: LCD) has the advantages of light weight, thin thickness, and no radiation. In recent years, liquid crystal display technology has developed rapidly, especially thin film transistor (Thin Film Transistor; hereinafter referred to as: TFT) LCD is the mainstream product of the existing LCD. It has developed from the original seven-pass lithography technology to the four-pass lithography technology that is commonly used now. [0003] The liquid crystal panel of TFT-LCD usually includes an array substrate and a color filter substrate arranged in opposite cells, and liquid crystals are filled between them. Among them, the fabrication of the array substrate is the most complicated. Generally, the fabrication of the array substrate is completed by f...

Claims

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Application Information

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IPC IPC(8): H01L21/82H01L21/768H01L27/02H01L23/528H01L29/24G02F1/1362G02F1/1368G03F7/00
CPCH01L33/08H01L27/12H01L27/1214H01L27/124
Inventor 刘翔谢振宇陈旭
Owner BEIJING BOE OPTOELECTRONCIS TECH CO LTD
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