Semiconductor device and manufacturing method thereof

Abstract

The invention provides a semiconductor device and a manufacturing method thereof. The manufacturing method comprises the following steps of: providing a semiconductor chip; embedding the final layer of metal interconnection layer in a dielectric layer in a chip region; forming a first passivation layer on the final layer of metal interconnection layer in the chip region, wherein a soldering pad opening is arranged at a position in the first passivation layer corresponding to the final layer of metal interconnection layer; forming a metal layer which covers on a dielectric layer in a marking region and the first passivation layer in the chip region, and forming a soldering pad layer connected with the final layer of metal interconnection layer from the metal layer in the chip region; forming a second passivation layer which covers on the metal layer in the marking region and the soldering pad layer in the chip region, wherein a top layer opening is arranged at a position in the second passivation layer corresponding to the soldering pad layer; and forming a mark of the semiconductor chip in the marking region, wherein the mark is embedded into the second passivation layer and the metal layer. The device and the manufacturing method can form an effective circuit in the marking region and obtain the distinct semiconductor chip mark.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor device and a manufacturing method thereof. Background technique [0002] In the semiconductor manufacturing process, it is usually necessary to use a laser to engrave a mark (IDmark) on the edge of the wafer to record information such as the batch number of the semiconductor wafer. In the initial manufacturing process of semiconductor wafers below 8 inches, marks are usually directly engraved on the polished semiconductor wafers before entering the normal manufacturing process, while in the manufacturing process of 12-inch semiconductor wafers, often after all the manufacturing processes are completed, Markings are engraved on the uppermost passivation layer. [0003] Usually, the area where the mark is engraved is no longer used to make the semiconductor device, so as to prevent the pattern of the semiconductor device from covering the mark, ...

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Problems solved by technology

[0006] Although the above-mentioned semiconductor device forms an effective circuit in the marking area M, the problem is that the mark 10 of the semiconductor wafer is engraved in the last metal interconnection layer 50, so that the final metal interconnection layer 50 The pattern of the mark 10 is confused with the pattern of the mark 10, resulting in a degradation of the reading quality of the mark 10

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