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Multistage etching and filling method of ultra-deep groove

A filling method and deep trench technology, which is applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problem that etching and filling processes are difficult to realize, easy to form voids, and difficult to etch steep trenches Problems such as side walls

Active Publication Date: 2010-06-23
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If the trench depth exceeds 10μm, the etching and filling processes are difficult to achieve
This is reflected in the fact that it is difficult to etch the steep trench sidewalls during etching; it is easy to form voids during filling.

Method used

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  • Multistage etching and filling method of ultra-deep groove
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  • Multistage etching and filling method of ultra-deep groove

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Embodiment Construction

[0020] The multi-level etching and filling method of the ultra-deep trench of the present invention, the ultra-deep trench refers to a trench with a depth of more than 20 μm, and the method comprises the following steps:

[0021] Step 1, see Figure 1a , according to the depth of the ultra-deep trench, the ultra-deep trench is decomposed into multi-level trenches from bottom to top (level 1 to level n, level 1 is at the bottom, level n is at the top), the The sum of the depths of the multi-level grooves is the depth of the ultra-deep grooves.

[0022] Figure 1a The simplest secondary structure is schematically shown, that is, the ultra-deep trench 2 is decomposed into a first-level trench 21 and a second-level trench 22 . The first-stage trench 21 is at the bottom, and the second-stage trench 22 is at the top. The sum of the depth h1 of the first-stage trench 21 and the depth h2 of the second-stage trench 22 is the depth h of the ultra-deep trench 2 .

[0023] For example...

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Abstract

The invention discloses a multistage etching and filling method of an ultra-deep groove deeper than 20 microns. In the invention, the ultra-deep groove is decomposed into multistage grooves from bottom to top; each groove is set to be in a depth allowable by the traditional etching and extension filling process. The invention changes the groove-filling process by replacing CVD or PVD filled polysilicon with extension grown monocrystalline silicon to improve the filling effect; the invention also utilizes silica as a hard photosensitive plate for etching each stage of groove and a selective separation layer for the extension of the monocrystalline silicon, removes the silica layer after finishing the extension filling of each stage of groove and smoothens by CMP to ensure the extension quality of the monocrystalline silicon of the next stage of groove. The invention adopts the method of multistage etching, multistage extension filling and finally forming an ultra-deep groove to solve the process difficulty of the ultra-deep groove on etching and filling.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit process, in particular to a trench etching and filling process. Background technique [0002] Ultra-high voltage MOS transistors with a breakdown voltage above 500V play an increasingly important role in power management. In the new ultra-high voltage MOS transistors, in order to reduce the on-resistance, the ultra-deep trench technology is adopted, that is, the trench depth reaches more than 20 μm. And it is necessary to fill the ultra-deep trench with P-type self-doped polysilicon or single-crystal silicon to help horizontally deplete the drift region of the NMOS transistor, so that the doping of the N-type drift region can be appropriately increased while maintaining a high breakdown voltage. impurity concentration, reducing the on-resistance. Therefore, realizing the etching and filling of the ultra-deep trench is the key to completing the ultra-high voltage MOS transistor. [0003] In ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/02H01L21/20H01L21/336
Inventor 钱文生王飞
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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