Lightly doped drain forming method and semiconductor device

Abstract

The invention provides a lightly doped drain forming method and a semiconductor device. The method comprises the following steps of: providing a semiconductor substrate, wherein the semiconductor substrate comprises a core device area and an input / output device area, and the side of a grid is provided with a first side wall; forming a masking layer on the semiconductor substrate to cover the core device area; removing the first side wall outside the side wall of the grid in the input / output device area; removing the masking layer covered on the core device area; forming lightly doped drains in the core device area and the input / output device area by a ion implantation method, wherein the first side wall outside the side wall of the grid in the core device area blocks the ions from being implanted into the lower area. The lightly doped drain forming method can improve the overlapping capacitance of the grid and source / drain, avoid generating hot carrier effect, and improve the property and reliability of the input / output device.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a lightly doped drain and a semiconductor device. Background technique [0002] When semiconductor devices such as NMOS transistors work, the gate is connected to a small forward voltage, and the holes in the P well under the gate oxide layer are repelled, and a depletion layer will be formed in the area close to the gate oxide layer; when the gate is on After the forward voltage of the gate continues to increase beyond a certain value (threshold voltage), the electric field between the gate and the substrate is strong enough to attract a large number of electrons from other places, and an inversion layer will be formed in this region. Since the inversion layer has a large number of the same carriers (electrons) as the source and drain, a conductive channel connecting the source and drain is formed, so the NMOS transistor is turned on. ...

AI Technical Summary

Problems solved by technology

However, for input / output devices, if the overlapping area is not enough, the hot carriers will be closer to the gate, and the hot carrier effect will be more likely to occur, resulting in the degradation of parameters such as saturation current and affecting the performance of semiconductor devices. and reliability

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