Method for preventing cavities from generating in deep groove insulation technology
A process and void technology, applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as reducing insulation performance, and achieve the effect of ensuring insulation performance, eliminating sharp corners, and avoiding voids
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[0015] The specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.
[0016] First, please refer to Figure 7 , Figure 7 It is a process flow diagram of a method for preventing voids in the deep trench insulation process of the present invention. As shown in the figure, the present invention includes the following steps:
[0017] Step 31: Form an active region protection layer on the semiconductor substrate. In actual operation, an oxide layer, such as a silicon oxide layer, is deposited on the substrate silicon first, and then a silicon nitride layer is deposited on the oxide layer. The substrate described in the invention is a substrate on which an oxide layer has been deposited on a silicon wafer;
[0018] Step 32: Etching the active region protection layer and the semiconductor substrate to form deep trenches, generally using silicon nitride as a hard mask, and defining steep grooves on the semiconduc...
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