Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

10 Gbps bit error analyzing instrument

A technology of bit error test and tester, applied in error detection/prevention using signal quality detector, electromagnetic wave transmission system, digital transmission system, etc. It can solve the problem of loss of synchronization of load signal, and achieve low power consumption and circuit structure. Simple and stable effect

Inactive Publication Date: 2010-02-03
SUPERXON (CHENGDU) TECH LTD
View PDF0 Cites 17 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If the jitter amplitude is too high, then there is a possibility that the payload signal will get out of sync (loss of frame, LOF)

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • 10 Gbps bit error analyzing instrument
  • 10 Gbps bit error analyzing instrument
  • 10 Gbps bit error analyzing instrument

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0019] The present invention will be further described below in conjunction with the accompanying drawings and implementation examples.

[0020] refer to figure 1 . figure 1 A preferred embodiment of the invention has been described. The 10Gbps error code analysis tester of the present invention mainly includes a test evaluation board connected with the device under test, and it can communicate with the user interaction interface software set on the PC. exist figure 2 On the test evaluation board shown, a bit error test chip module for sending, receiving, and error detection and counting of pseudo-random code sequences is set. The bit error test chip is connected to the device under test, and simultaneously outputs and inputs signals to the device under test.

[0021] The microcontroller is a C8051 series single-chip microcomputer, which is used to communicate with the upper PC and the lower test chip. There are firmware codes on the single-chip microcomputer, which is c...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a 10 Gbps bit error analyzing instrument and aims to provide a bit error analyzing instrument which has low cost, simple and convenient operation and convenient carrying and issuitable for engineering field test. The 10 Gbps bit error analyzing instrument comprises an evaluation board and a single chip microcomputer of C8051 series, wherein the evaluation board can carry out communication with a PC, and a bit error test chip which is connected with equipment to be tested is arranged on the evaluation board; and the single chip microcomputer is used for carrying out communication with an upper PC and a lower test chip, and is provided with a USB interface which carries out communication with the PC and an I2C double line type serial bus which is connected with the bit error test chip to carry out communication and control. The bit error test chip provides sent bit flow and total amount of bit error to the PC through the single chip microcomputer, and the sent bit flow is obtained by test time recorded by the single chip microcomputer and appointed frequency output by the test chip. The invention has the advantages of convenience, rapidness and accurate bit error analysis test and is suitable for performance test of a 10 Gbps communication system.

Description

technical field [0001] The present invention relates to an optical communication instrument for installing and maintaining a high-speed 10G optical network. More specifically, the present invention relates to a code error analysis tester mainly for performing code error analysis on communication equipment around 10Gbps. technical background [0002] In the communication system, network maintenance personnel often encounter problems such as unconnected communication lines, unreceived communication data, high bit error rate of communication lines, mismatching communication network regulations, and failure to connect communication network equipment. The bit error analysis tester is an important tool to help maintenance personnel quickly find out the network problem, solve the network problem and measure the line quality. It mainly performs installation test, project acceptance and daily maintenance on data communication equipment and lines, realizes functions such as data commu...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H04B10/08H04L12/26H04L1/20H04B10/073
Inventor 刘海周健
Owner SUPERXON (CHENGDU) TECH LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products