Array substrate for liquid crystal display device

Abstract

An array substrate for a liquid crystal display device includes a substrate having a display region and a non-display region at a periphery of the display region; a gate line, a data line, a thin film transistor and a pixel electrode on the substrate and in the display region; a drive integrated circuit on the substrate and in the non-display region; first and second test pads at both sides of the drive integrated circuit, respectively; a common voltage line on the substrate and along edges of the non-display region; and first and second static electricity protecting units on the substrate and in the display region, the first static electricity protecting unit connecting the first test pad with the common voltage line, and the second static electricity protecting unit connecting the second test pad with the common voltage line.

Description

[0001] This application claims priority from Korean Patent Application 2008-0055901 filed in Korea on Jun. 13, 2008, which is hereby incorporated by reference. technical field [0002] The invention relates to an array substrate of a liquid crystal display (LCD) device, in particular to an array substrate of an LCD device capable of preventing electrostatic damage. Background technique [0003] One prior art liquid crystal display (LCD) device utilizes the optical anisotropy and polarization properties of liquid crystal molecules. The liquid crystal molecules have a definite alignment direction due to the elongated shape. The alignment direction of the liquid crystal molecules can be controlled by applying an electric field across the liquid crystal molecules. In other words, when the strength and direction of the electric field are changed, the alignment of the liquid crystal molecules is also changed. Since incident light is refracted based on the orientation of the liqu...

AI Technical Summary

Problems solved by technology

However, in the step of forming electrodes and wirings on the array substrate 10, due to particles or pulse-shaped currents in the processing chamber, there may be induced Static electricity

[0012] Since static electricity induced at the driving IC 35 and the first and second test pads 60 and 62 flows into the gate line 20 and the data line 30, the desired operation of the TFT cannot be obtained.

Therefore, the yield of the product is reduced

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