Method of forming conductive lines and similar features

Abstract

The invention relates to a method of forming conductive lines and similar features. A print-patterned structure may be used as a self-aligned etch and deposition mask. A method of forming conductive lines and other similar features over a plurality of layers comprises forming a print-patterned structure over a first layer. The print-patterned structure is used as an etch mask to expose a portion of a second layer. A seed layer is formed over the exposed portion of the second layer, using the print-patterned structure as a deposition mask. Conductive lines or other features may be formed, for example, by electroplating using the seed layer as a contact pad and the print-patterned structure as deposition mask. The present invention is particularly useful in the formation of features for solar cells and the like where the print-patterned structure may be used to form high aspect ratio features.

Description

technical field [0001] The present invention relates generally to digital lithography, and more particularly to printed masks and methods of using a single said mask for etching and plating, for example in the manufacture of solar cell devices. Background technique [0002] Digital inkjet lithography is a well-established technology designed to reduce the costs associated with photolithography processes, which are commonly used in the fabrication of microelectronic devices, integrated circuits, and related structures. Digital lithography deposits material directly on a substrate in a desired pattern, replacing the delicate and time-consuming photolithography process used in conventional device fabrication. One application of digital lithography is the formation of masks (referred to herein as "print-patterned masks") for subsequent processing (eg, plating, etching, implantation, etc.). [0003] Typically, digital lithography involves depositing printed material by moving a ...

AI Technical Summary

Problems solved by technology

[0009] However, each of these prior art processes has disadvantages

For example, the lithography step has the following disadvantages: the time required to complete several pattern and process steps up to the etch layer and form the conductive lines; the expense required to manufacture a different reticle for each step; Precise registration and alignment of steps; requires the use of expensive photoresists; and exposes bulk structures (such as crystalline silicon) to extensive processing, increasing the risk of damage

The silver / frit process has the disadvantages of introducing stresses on the bulk structure that must be counteracted by stresses acting on the surface opposite to the silver / frit coated surface; and producing low, wide ( low aspect ratio), which prevents parts of the photosensitive material from receiving photons (i.e. reduces the overall efficiency of the device)

Each of these disadvantages will become more pronounced as the wafer size of photosensitive materials tends to continue to increase

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