Scheduling of housekeeping operations in flash memory systems
A memory system, housekeeping technology, applied in memory systems, static memory, read-only memory, etc.
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[0044] Memory Architecture and Its Operation
[0045] Referring first to FIG. 1A, a flash memory includes a memory cell array and a controller. In the example shown, two integrated circuit devices (chips) 11 and 13 include an array of memory cells 15 and a plurality of logic circuits 17 . The logic circuitry 17 interfaces with a controller 19 on a separate chip via data, command, and status circuitry, and also provides addressing, data transfer and sensing, and other support to the array 13 . The number of memory array chips can range from one to many, depending on the storage capacity provided. Alternatively, the controller and part or the entire array could be combined on a single integrated circuit chip, but this is not currently an economical option. A flash memory device that relies on a host to provide controller functions contains approximately only memory integrated circuit devices 11 and 13 .
[0046]A typical controller 19 includes a microprocessor 21, a read-onl...
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