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High-frequency IC circuit packing structure and its production

An integrated circuit and high-frequency technology, which is applied in the field of high-frequency memory chip packaging structure and its manufacturing, to achieve the effect of reducing production costs and shortening the electrical conduction path

Inactive Publication Date: 2008-11-26
CHIPMOS TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] The main purpose of the present invention is to overcome the defects of the existing integrated circuit packaging structure and provide a new high-frequency integrated circuit packaging structure. The technical problem to be solved is to shorten the electrical conduction between the substrate and the chip. path, and does not need to increase the production cost of the substrate and wafer, so it is more suitable for practical use

Method used

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  • High-frequency IC circuit packing structure and its production
  • High-frequency IC circuit packing structure and its production
  • High-frequency IC circuit packing structure and its production

Examples

Experimental program
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Effect test

no. 1 Embodiment

[0078] see Figure 5 Shown is a schematic cross-sectional view of a high-frequency integrated circuit package structure according to the first specific embodiment of the present invention. The high frequency integrated circuit package structure 300 of the first preferred embodiment of the present invention mainly includes a substrate 310 , a chip 320 with a plurality of bumps 323 and a plurality of conductive fillers 330 .

[0079] In this embodiment, the substrate 310 is a single-layer circuit flexible board without plated through holes (PTH), such as COF, TCP or PI circuit films. The substrate 310 has an upper surface 311 , a lower surface 312 , and a plurality of bump receiving through holes 313 passing through the upper surface 311 to the lower surface 312 and includes a circuit layer 314 . In this embodiment, the bump accommodating through hole 313 is a cylindrical through hole, and its diameter is only slightly larger than the outer diameter of the bump 323. The circuit...

no. 2 Embodiment

[0085] Also, see Figure 8 Shown is a schematic cross-sectional view of a high-frequency integrated circuit package structure according to the second specific embodiment of the present invention. In the second preferred embodiment of the present invention, the high frequency integrated circuit package structure 400 mainly includes a substrate 410 , a chip 420 and a plurality of conductive fillers 430 .

[0086] The substrate 410 has an upper surface 411, a lower surface 412, and a plurality of through-holes 413 through which the upper surface 411 penetrates the lower surface 412, and includes a circuit layer 414, which can be formed on the lower surface 412. Or the upper surface 411 , the circuit layer 414 includes a plurality of connection pads 415 , and the connection pads 415 are located at the lower edge of the bump receiving through hole 413 .

[0087] The chip 420 is a dynamic random access memory chip, which has an active surface 421 and a plurality of bumps 423, and t...

no. 3 Embodiment

[0090] see Figure 9 Shown is a schematic cross-sectional view of a high-frequency integrated circuit packaging structure according to the third specific embodiment of the present invention. The third specific preferred embodiment of the present invention discloses another high-frequency integrated circuit packaging structure. The high frequency integrated circuit package structure 500 mainly includes a substrate 510 , a chip 520 , a patterned die bonding layer 530 and a plurality of conductive fillers 540 .

[0091] The substrate 510 has an upper surface 511 , a lower surface 512 , and a plurality of bump receiving through holes 513 passing through the upper surface 511 to the lower surface 512 , and includes a circuit layer 515 . An electroplating layer 514 can be formed on the inner wall of the bump accommodating through hole 513 , which is electrically connected to the circuit layer 515 .

[0092] The chip 520 has an active surface 521 and a plurality of bumps 523, the bu...

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Abstract

The invention is concerned with the conformation and the manufacture method of the high frequency integrated circuit, it comprising of: the base plate, the protruding chip and plural number of conducting filling. The base plat consists of the circuit layer and plural number of protruding containing via hole crossing from upper surface to bottom surface. The initiative surface of the protruding chip sticks to the upper surface of the base plate in order that the plural number of the protruding blocks of the protruding chip contains in the corresponding protruding containing via hole. The conducting filling forms in the protruding containing via hole in order to electric connect the protruding blocks to the circuit layer.

Description

technical field [0001] The present invention relates to a high frequency integrated circuit packaging structure and its manufacturing method, in particular to a high frequency memory chip packaging structure and its manufacturing method (High frequent IC package and method for fabricating the same). Background technique [0002] In the packaging structure of integrated circuits (i.e., integrated circuits), the method of electrically connecting the chip and the substrate is mainly by wire-bonding to electrically connect the chip and the substrate, or by flip chip bonding (flip chip bonding). Mounting) method, the bumps on the surface of the flip chip are directly bonded to the substrate to complete the electrical connection between the substrate and the chip. The above two methods can be implemented for different purposes and uses of integrated circuit packaging structures. [0003] see figure 1 As shown in FIG. 1 , is a schematic cross-sectional view of a conventional wire-...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/498H01L23/50H01L23/31H01L21/60H01L21/56
CPCH01L2924/15311H01L24/16H01L2224/48091H01L2224/73215H01L2224/16225H01L2224/73204H01L2224/32225H01L2924/3025H01L2224/4824H01L2224/16H01L2924/14H01L2924/351H01L2924/00014H01L2924/00H01L2924/00012
Inventor 黄祥铭刘安鸿林勇志李宜璋杜武昌林俊宏邱士峰
Owner CHIPMOS TECH INC
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