Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Semiconductor device having metal gate and manufacturing method thereof

a technology of semiconductor devices and manufacturing methods, which is applied in the direction of semiconductor devices, electrical devices, transistors, etc., can solve the problems of high thermal budget and impact on the process of metal gate, and improve the performance of transistor devices, and achieve high thermal budget

Inactive Publication Date: 2015-12-24
UNITED MICROELECTRONICS CORP
View PDF6 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0010]According to the semiconductor device having metal gate and the manufacturing method thereof provided by the present invention, the metal-last process is integrated with the epitaxy technique. Accordingly, the epitaxial channel layer is formed in the gate trench after performing steps having high thermal budget such as source / drain formation, and silicide process. And the metal gate is subsequently formed in the gate trench. Since the epitaxial channel layer and the metal gate are all formed after process requiring high temperature, qualities of the metal gate and the epitaxial channel layer are no longer impacted by those processes and thus performance of the transistor device is improved.

Problems solved by technology

It is observed that processes with high thermal budget impacts not only the metal gate process, but also the quality of the epitaxial layers.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Semiconductor device having metal gate and manufacturing method thereof
  • Semiconductor device having metal gate and manufacturing method thereof
  • Semiconductor device having metal gate and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0022]Please refer to FIGS. 1-6, which are drawings illustrating a manufacturing method for a semiconductor device having metal gate provided by a first preferred embodiment of the present invention. As shown in FIG. 1, the preferred embodiment first provides a substrate 100 such as silicon substrate, silicon-containing substrate, or silicon-on-insulator (SOI) substrate. The substrate 100 includes a core region 102 and a peripheral region 104 defined thereon. An isolation structure 106, such as a shallow trench isolation (STI) is formed in the substrate 100 between the core region 102 and the peripheral region 104 for rendering electrical isolation. A first semiconductor device 110 is formed in the core region 102 and a second semiconductor device 112 is formed in the peripheral region 104. In the preferred embodiment, the first semiconductor device 110 and the second semiconductor device 112 include the same conductivity type. However, those skilled in the art would easily realize ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
thicknessaaaaaaaaaa
thicknessaaaaaaaaaa
thicknessaaaaaaaaaa
Login to View More

Abstract

A manufacturing method of a semiconductor device having metal gate includes providing a substrate having a first semiconductor device formed thereon, and the first semiconductor device includes a first dummy gate. Next, the dummy gate is removed to form a first gate trench in the first semiconductor device, and the substrate is exposed in a bottom of the first gate trench. Subsequently, an epitaxial channel layer is formed in the first gate trench.

Description

CROSS REFERENCE TO RELATED APPLICATIONS[0001]This application is a division of U.S. application Ser. No. 13 / 943,721 filed on Jul. 16, 2013, and incorporated herein by reference in its entirety.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The invention relates to a semiconductor device having metal gate and manufacturing method thereof, and more particularly, to a semiconductor device having metal gate and manufacturing method integrated with epitaxy technique.[0004]2. Description of the Prior Art[0005]With semiconductor processes entering the era of the deep submicron meter, it has been more and more important to increase the metal-oxide semiconductor (MOS) drive current. To improve device performance, epitaxy technique is developed to enhance carrier mobility of the channel region.[0006]On the other hands, with the trend toward scaling down the size of the semiconductor device, work function metals are provided to replace the conventional polysilicon gate to be t...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(United States)
IPC IPC(8): H01L29/66H01L29/78H01L21/8238
CPCH01L29/66545H01L21/823807H01L21/823828H01L29/7848H01L21/823857H01L29/6659H01L29/66636H01L29/66651H01L29/16H01L29/20H01L29/42364H01L29/495H01L29/4966H01L29/517
Inventor HOU, YONG TIAN
Owner UNITED MICROELECTRONICS CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products