Integrated Circuit and Sensor for Imaging

Abstract

New sensors and different embodiments of multi-channel integrated circuit are provided. The new high energy and spatial resolution sensors use both solid state and scintillator detectors. Each channel of the readout chip employs low noise charge sensitive preamplifier(s) at its input followed by other circuitry. The different embodiments of the sensors and the integrated circuit are designed to produce high energy and / or spatial resolution two-dimensional and three-dimensional imaging for widely different applications. Some of these applications may require fast data acquisition, some others may need ultra high energy resolution, and a separate portion may require very high contrast. The embodiments described herein addresses all these issues and also other issues that may be useful in two and three dimensional medical and industrial imaging. The applications of the new sensors and integrated circuits addresses a broad range of applications such as medical and industrial imaging, NDE and NDI, security, baggage scanning, astrophysics, nuclear physics and medicine.

Description

[0001]This application is a divisional of co-pending U.S. application Ser. No. 10 / 378,664 filed Mar. 5, 2003, now issued U.S. Pat. No. 7,868,665, which claims the benefit of the filing date of U.S. Provisional Patent Application No. 60 / 361,330 filed Mar. 5, 2002, both of which are incorporated herein by reference. This application also references previous U.S. Pat. Nos. 5,696,458, 6,150,849 and 6,333,648 by the inventor, which are both incorporated herein by reference for all purposes.GOVERNMENT RIGHTS NOTICE[0002]This invention was made with U.S. Government support under Contract Numbers DAMD 17-98-8137, DAAE30-02-C-1015 and DAAE30-02-C-10270, which are awarded by Department of Defense. The U.S. Government has certain rights in the invention.FIELD OF THE INVENTION[0003]There is need for high spatial and energy resolution photonic sensors and integrated circuits (IC) are needed to produce imaging. Scintillation counters read out by individual photomultiplier tubes has limitations in...

AI Technical Summary

Benefits of technology

The new RENA-2 ASIC is a flexible and easy-to-use design that can be used for a wide range of applications. It features low-noise performance, self-trigger capability, several different peaking times, and the daisy-chain option. The chip also includes user-selectable dynamic ranges, fast trigger output, and the ability to provide channel-by-channel time difference information. The design goal for noise performance is significantly improved over the present RENA chip and substantial innovation was required to reach this goal. The new chip incorporates a pole zero cancellation circuit to handle large rates without significant pileup, and is tolerant to leakage current so that it can be used DC coupled. The new features include low noise, self resetting charge sensitive input amplifier, and fast trigger output for coincident event detection. The peaking times can be adjusted from about 0.4 to 40 microseconds, making the chip suitable for a wide range of detectors. The design is improved by eliminating unnecessary connections and interface. Overall, the new RENA ASIC is a significantly improved design that addresses different requirements for various applications.

Problems solved by technology

Although an excellent detector, silicon, with an atomic number (Z) of 14, does not have good quantum efficiency for higher energy x-rays and gamma rays.

Although strongly promising high-Z position sensitive solid state detectors were developed, an essential component to make them viable instruments for detecting and imaging x-rays, gamma rays and particles has been missing.

Such detectors have many channels with small pitch, and reading them out with conventional discrete or hybrid electronics is not a viable option.

1. They do not have a self trigger output. In high energy physics experiments, an external machine trigger is available to inform the data acquisition (DAQ) system about the exact time of an event for reading out the chips. In addition, the event trigger is typically based on the overall event topology rather than the signal levels in individual channels, which precludes its implementation on the readout chip.

2. The solid-state detectors for which these ASICs were developed provide position information only; the energy information is largely irrelevant as the particles of interest are all minimum ionizing. Consequently, such chips do not need to have low noise and thus high energy resolution capability.

Therefore, the application of position sensitive solid state detectors to nuclear and astrophysics and to medical and industrial imaging was largely delayed as a suitable ASIC readout chip was not available.

Also the RENA chip could only partially answer the requirements of many applications listed above.

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