Phase change memory device and fabrication method thereof

Abstract

A phase change memory device is disclosed. A first dielectric layer having a sidewall is provided. A bottom electrode is adjacent to the sidewall of the first dielectric layer, wherein the bottom electrode comprises a seed layer and a conductive layer. A second dielectric layer is adjacent to a side of the bottom electrode opposite the sidewall of the first dielectric layer. A top electrode couples the bottom electrode through a phase change layer.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The invention relates to a memory device and more particularly, relates to a phase change memory device and fabrication method thereof.[0003]2. Description of the Related Art[0004]Phase change memory devices have many advantages, such as faster speeds, lower power consumption, large capacity, greater endurance, better processing integrity and lower cost. Phase change memory devices can thus be used as stand-alone or embedded memory devices with high degree of integrity. Due to the described advantages and others, phase change memory device may substitute in place of volatile memory devices, such as SRAM and DRAM, or non-volatile memory devices, such as flash memory devices for respective applications.[0005]Phase change memory devices write, read or erase according to different resistances of a phase change material between a crystal state and a non-crystal state. For example, a relatively high current and short pulse, s...

AI Technical Summary

Benefits of technology

[0009]A detailed description is given in the following embodiments with reference to the accompanying drawings. These and other problems are generally solved or circumvented, and technical advantages are generally achieved, by the invention. Specifically, an embodiment of the invention provides a phase change memory device having a contact area between a phase change layer and a bottom electrode not limited by lithography, and having small parasitic resistance to increase design flexibility.

Problems solved by technology

The phase change memory device 100, however, has higher parasitic resistance, thus affecting voltage drop thereof.

Consequently, resistance of the bottom electrode 104 comprising TaN is not low enough.

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