Data processing apparatus having memory protection unit

Abstract

A data processor (100) has a memory operable to store data values; a memory protection unit (130) operable to associate memory attributes with portions of said memory and to identify a plurality of memory regions corresponding to respective address ranges of said memory. The memory protection unit is operable to associate with at least one of the plurality of memory regions (150) a respective memory region specifier comprising an attributes field (230) for defining a set of memory attributes associated with said memory region and a sub-region field (240) for holding a sub-region membership value. The sub-region membership value specifies, for each of a plurality of sub-regions of the memory region, whether respective sub-regions (160-1 to 160-8) are member sub-regions or non-member sub-regions such that said memory attributes are applied to said member sub-regions but are not applied to said non-member sub-regions.

Description

BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] This invention relates to data processing systems. More particularly, this invention relates to data processing systems having memory protection units. [0003] 2. Description of the Prior Art [0004] It is known to control memory access in data processing systems using memory protection units. These memory protection units define a plurality of protection regions whose properties are configured by writing to protection unit registers. This provides a level of control over memory properties and enables different memory regions with different attributes to be specified. Memory protection units are similar to memory management units, but are simpler in the sense that they do not involve mapping of virtual to physical addresses. Furthermore, memory protection units do not use translation tables, but limit themselves to a relatively small number of regions in hardware to improve the predicatability of response. [0005] It i...

AI Technical Summary

Benefits of technology

The present invention provides an apparatus for processing data with a memory region that can be sub-divided into multiple sub-regions. Each sub-region can have its own set of memory attributes, which can be different from the memory attributes of other sub-regions. This flexibility allows for efficient allocation of memory resources and the ability to grant different access permissions to different sub-regions. The memory attributes can include memory access permissions, indicating which sub-region can be cached or buffered. The invention also allows for the allocation of non-member sub-regions, which can be useful in situations where there are constraints on the size of the memory region. Overall, the invention provides a more efficient and flexible way to allocate memory resources for data processing.

Problems solved by technology

Furthermore, memory protection units do not use translation tables, but limit themselves to a relatively small number of regions in hardware to improve the predicatability of response.

However, in order to simplify the implementation cost there are usually certain constraints on the way that memory regions can be allocated.

This means that it is not possible in such systems to define memory regions of arbitrary size.

Although, systems having arbitrary sized memory regions can be built, it is much more expensive to do so.

Furthermore, the delineation of memory regions by known memory protection units is particularly inflexible in situations where application processes running on the data processing apparatus require access permission to different groups of peripheral devices.

This difficulty arises from the situation that typically a contiguous block of memory will be allocated to a full set of peripheral devices.

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