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Sensitive amplifier for electric EPROM

A technology of sensitive amplifier and read-only memory, which is applied in the application field of embedded EEPROM, can solve the problems of sensitive amplifier discrimination reduction, complex control logic, slow speed, etc., achieve simple structure, reduce charging voltage, and improve readout speed effect

Inactive Publication Date: 2007-04-18
HUAZHONG UNIV OF SCI & TECH
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  • Abstract
  • Description
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Problems solved by technology

[0007] 2) With the degradation of the characteristics of the floating gate tube, the reference current I ref It will deviate from its ideal value, which will lead to a decrease in the discrimination of the sensitive amplifier and a slower speed;
[0008] 3) Since there are many floating nodes in this circuit, complex control logic must be used to prevent the charge stored in the floating nodes from affecting the correctness of the readout

Method used

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  • Sensitive amplifier for electric EPROM
  • Sensitive amplifier for electric EPROM

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example

[0026] The description of this example is based on the circuit design based on the SMIC (SMIC) 0.35μm process with embedded EEPROM. The process library defines that the threshold voltage of the floating gate tube MC tube storing "0" information is 4V, and the threshold voltage of the floating gate tube MC tube storing "1" information is -1V. The working voltage VCC of the whole EEPROM=3V.

[0027] When the circuit is working, the voltages applied to CG and SG are 1.5V and 3V respectively. After charging to BL, if the floating gate tube MC stores "0" information, the floating gate tube MC will not conduct, and the potential of BL will be 0V , the readout signal of "0" is obtained at the output terminal; if the floating gate tube MC tube stores "1" information, the floating gate tube MC tube is turned on and the BL is charged to:

[0028] V BL =min(3-V tms , 1.5-V tmc )

[0029] As long as V BL >1.5V, you can get the correct "1" readout signal.

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Abstract

The invention discloses a sensitivity amplifier for EEPROM. It includes charge control circuit and detecting output circuit. The charge control circuit includes PMOS tube P1 and NMOS tubes N1, N2. Detecting output circuit includes PMOS tubes P2, P3 and NMOS tubes N3, N4, N5. The invention uses the bidirectional ducting ability of MOS tube to take charge to drain electrode. The source electrodes of floating grid tube are connected to each other to decrease charging circuit quantity. By modifying the reverse threshold value of the inverter, the charging voltage would be decreased, and read speed would be improved. The invention is especially suitable for embedded EEPROM.

Description

technical field [0001] The invention belongs to the technical field of non-volatile memory, in particular to a sense amplifier (sense amplifier) ​​used in Electrically Erasable Programmable Read-Only Memory (EEPROM), especially suitable for application in embedded EEPROM. Background technique [0002] The entire EEPROM is composed of two parts: a memory cell and a peripheral circuit. The peripheral circuit consists of a column decoder, a row decoder, a sense amplifier, a high voltage generator, and a Gap (bandgap), logic control (control logic), data latch (data latch) and other circuits. [0003] The power dissipation of EEPROM is mainly composed of four parts: static power dissipation, read power dissipation, write power dissipation and digital power consumption. The static power consumption mainly comes from the extra power consumption generated when the fluctuation voltage drives the decoding circuit and the large node parasitic capacitance in the levelshifter circuit; ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/26
Inventor 邹雪城刘冬生刘政林张帆童乔凌邓敏
Owner HUAZHONG UNIV OF SCI & TECH
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