Input under-voltage/over-voltage protection circuit

Abstract

This invention relates to a new type of input low voltage / over voltage protection circuit used in assistant supply including a voltage sample circuit, a logic control circuit, a back lash control circuit used in low voltage back lash processing said sample output to be output to said logic control circuit, which ensures outputs of the assistant supply can fall to the safety low voltage and then starts up when the input meets with quick falling, transient, glittering or low frequency interference to avoid logic errors.

Description

[Technical Field] [0001] The invention relates to an input undervoltage or overvoltage protection circuit, in particular to an input undervoltage or overvoltage protection circuit applied to an auxiliary power supply. [Background technique] [0002] Because the previous under-voltage or over-voltage protection is mainly to prevent damage to the input devices, PCB wiring, etc. due to excessive input current when the input low-voltage output is fully loaded, or the power supply is damaged due to excessive input voltage, mainly It is designed to protect the main power circuit, and generally does not require undervoltage or overvoltage protection for the auxiliary power supply itself. But at present, the requirements for the environment and compatibility of power products are getting higher and higher, and the input voltage range is getting wider and wider. In addition, the existence of various input interferences (such as rapid drops, transients, flicker, etc.) The requirements of ...

AI Technical Summary

Problems solved by technology

[0004] figure 2 It is a schematic diagram of the circuit structure of the detection and protection circuit composed of transistors, and its working sequence diagram is as follows image 3 As shown, the principle is: when the input voltage drops, if the input voltage starts to drop at time t1, the input sampling voltage of the sampling circuit starts to drop at the same time, and the input voltage drops to the input undervoltage protection point at time t2, and the corresponding input sampling voltage drops to Input the undervoltage shutdown point, the output of the PWM chip is turned off, and the output voltage begins to drop; in the period from t2 to the time period, the input voltage begins to rise after falling for a period of time, and at time t3 because the input voltage rises beyond the input undervoltage protection point, sampling The voltage correspondingly starts to rise to the input undervoltage start point (because there is no hysteresis, the undervoltage shutdown point and the undervoltage start point are almost the same), the PWM chip has output again, and the output voltage starts to rise. If the output voltage drops within the unsafe range of the output voltage In this case, the output power supply to the DSP or CPU may cause program confusion or latch phenomenon, and even damage the DSP or CPU chip; at the same time, the range of each output voltage drop and the starting point and speed of the rise If it is not controlled, the timing of each output voltage may be incorrect, especially when the input voltage undervoltage protection occurs more frequently, the output timing of each channel may be more chaotic, resulting in unexpected errors or even damage to the subsequent circuit

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