Graded temperature compensation refreshing method and circuit thereof

Abstract

This invention relates to a graded temperature compensation refreshing method and circuit thereof. Wherein, producing a reference voltage free to temperature by a band-gap reference voltage source and a working voltage with inverse proportion to temperature by a parasitic triode; comparing by a staged controller the two former voltages to product the selection information for every stage temperature control; according to the selection signal, producing different-frequency refresh clock by a controllable clock generator. This invention controls refresh frequency, and has no dc loop when on lock condition to reduce power consumption greatly.

Description

technical field [0001] The invention belongs to the technical field of MOS transistor integrated circuit design, and in particular relates to a circuit design for compensating and refreshing memory cells. Background technique [0002] A dynamic memory manufactured using a CMOS process uses a capacitor as a storage unit to store charges to achieve the function of storing information. Since the charge stored in the capacitor will be lost due to leakage, in order to ensure the correctness of the stored information, it is necessary to perform a compensation refresh on the memory cell. The rate at which a memory cell leaks electricity determines how often the memory needs to be refreshed. The greater the leakage rate, the higher the refresh rate required. [0003] The leakage current of the memory cell is exponentially related to the temperature: Is=Io EXP (-Eg / kT), where Is is the leakage current; Io is a constant related to the semiconductor material; Eg is the energy band of...

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Problems solved by technology

When the device operating temperature is low, the same refresh rate results in a waste of energy

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