Abnormal logic business simulating test device

Abstract

An extraordinary logic business simulating test device includes extraordinary simulating test interface (ETI), interface control station, order receiving module, and universal FII modules. The ETI module includes order receiving and decomposing module, fault locating module, fault interpreting and inserting module, and interface signal channel module. The present invention separates the fault interpreting design from the BFM design, so that the fault interpreting extraordinary simulating test can be realized via special ETI and this simplifies the BFM design and FTI module. The present invention is universal and independent, has more functions, facilitates various fault insertion, and may be used in all logic test platforms.

Description

technical field [0001] The invention relates to an abnormal logic service simulation test device for large-scale logic function verification simulation. Background technique [0002] When performing large-scale logic function verification simulation on logic devices, in addition to verifying the basic functions of the simulation logic, it is often necessary to design a large number of abnormal simulation use cases to verify the design reliability and fault tolerance of the logic, among which fault insertion, such as : Signal glitches, signal highs and lows, signal timing offsets, data errors, address errors, clock loss, clock interruptions, clock frequency changes, clock duty cycle changes, etc., are the main content of abnormal simulation use cases. At present, when implementing logic function verification simulation, such as figure 1 Logic simulation test platform (TestBench), figure 1 The test platform adopts a three-layer hierarchical design: the test case module (Test...

AI Technical Summary

Problems solved by technology

The above-mentioned first implementation method usually has the following disadvantages: First, because the behavior function module is usually designed according to the normal behavior function of the interface, to add the fault insertion function, it is necessary to be very clear about the design and interface protocol of each behavior function module, and the design is difficult very big

Second, the realized functions are very limited, and each fault insertion abnormal simulation test requires corresponding modifications to the behavioral function modules

Third, because the method of fault insertion is related to the function and interface protocol of the behavioral function module, the designed code cannot be reused in the design of other behavioral function modules

Fourth, it is difficult to realize test automation and the test efficiency is low

Although the above-mentioned second method is relatively simple in design, it also has the other three problems of method one

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