Novel balanced Schottky frequency doubling structure and use method thereof

Abstract

The invention discloses a novel balanced Schottky frequency doubling structure and a use method thereof. The structure comprises an input waveguide directional coupler, two Schottky diode pairs, two direct current feed networks and a three-port differential output probe, wherein the input waveguide directional coupler can provide two paths of input signals with equal amplitude and 90-degree phase difference for a circuit; the Schottky diode pairs are symmetrically arranged in a mirror image manner; the frequency doubling structure disclosed by the invention can realize intrinsic suppression of odd harmonics and 2N harmonics (N is an even number), the structure has the advantages of high efficiency, relatively wide bandwidth, high circuit integration level and small parasitic loss, and the power capacity and the frequency doubling efficiency of the structure are improved compared with those of an existing balanced Schottky frequency doubling structure.

Description

technical field [0001] The invention belongs to the technical field of frequency multipliers, and in particular relates to a novel balanced Schottky double frequency structure and a method for using the same. Background technique [0002] Schottky diode-based terahertz frequency doubling sources have become critical devices in various submillimeter wave system applications, and have been widely used in spaceborne radiometers, imaging receivers, and frequency extenders in vector networks. Applications. With the high frequency and arraying of various applications, there is also a higher demand for frequency multiplier sources above 500GHz. Since the 1980s, people have gradually improved the design theory of frequency multipliers based on Schottky diodes. The design is favored and also shows excellent performance. Among them, the balanced frequency multiplier circuit loaded with DC bias voltage can adjust the impedance of the varactor diode, and has higher impedance matching...

AI Technical Summary

Problems solved by technology

This multi-channel synthesis expansion method will introduce redundant peripheral synthesis networks, and its transmission loss will greatly attenuate the overall frequency multiplication efficiency of the circuit; in addition, the more channels, the more assembly times in different time and space, As a result, the inconsistency between the amplitude and phase of each channel will be more obvious, further reducing the synthesis efficiency. Assuming that the binary synthesis form is adopted, the dual-channel synthesis efficiency due to transmission loss and assembly inconsistency is γ (less than 1), then 2N channels The frequency multiplier efficiency of the synthesis circuit will drop to γ ​​of the efficiency of the single frequency multiplier circuit N times, which means that as the number of channels increases, the attenuation value of the efficiency will become larger and larger, which also limits the maximum number of synthesized channels

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