Semiconductor structure and forming method thereof

Abstract

The invention discloses a semiconductor structure and a forming method thereof. The semiconductor structure comprises a substrate; the gate structure is separated from the substrate and comprises a gate contact region which is in contact with the gate plug; the source-drain doped region comprises a source-drain contact region and a source-drain connection region; the dielectric structure layer is positioned on the substrate at the side part of the gate structure and covers the source-drain doped region and the gate structure; the source-drain contact structure is in contact with the source-drain doped region, the source-drain contact structure is of an integrated structure and comprises a source-drain plug penetrating through the dielectric structure layer of the source-drain contact region and a source-drain contact layer located in the dielectric structure of the source-drain connection region, and the top surface of the source-drain contact layer is lower than the top surface of the source-drain plug; the source-drain contact structure and the dielectric structure layer enclose an interval opening; the interval dielectric layer is filled in the interval opening; and the gate plug is positioned at the top of the gate structure of the gate contact region and is in contact with the gate structure. According to the embodiment of the invention, the source-drain contact structure is an integrated structure, and the electrical connection performance between the source-drain plug and the source-drain contact layer is improved.

Description

technical field [0001] Embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular, to a semiconductor structure and a method for forming the same. Background technique [0002] With the continuous development of integrated circuit manufacturing technology, people's requirements for the integration and performance of integrated circuits are becoming higher and higher. In order to improve the integration level and reduce the cost, the critical dimensions of the components are becoming smaller, and the circuit density inside the integrated circuit is increasing. This development makes the wafer surface unable to provide enough area to make the required interconnection lines. [0003] In order to meet the requirements of interconnect lines after the critical dimension has been shrunk, the current conduction between different metal layers or the metal layers and the substrate is achieved through an interconnect structure. The inter...

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Problems solved by technology

[0005] However, the performance of current semiconductor structures still needs to be improved

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