Manufacturing method of semiconductor structure and semiconductor structure

Abstract

The invention provides a manufacturing method of a semiconductor structure and the semiconductor structure, relates to the technical field of semiconductor manufacturing, and aims to solve the problems that a titanium nitride layer in a current work function adjustment layer is easy to oxidize, so that an interlayer resistance value is increased, and the performance of the semiconductor structure is influenced. The manufacturing method of the semiconductor structure comprises the steps of providing a substrate; forming a stack layer on the substrate; wherein the stack layer comprises an interface layer, a high dielectric constant layer and a work function composite layer which are stacked in sequence; forming a transition layer on the stack layer; and forming a metal gate layer on the transition layer. Wherein the work function composite layer is prepared through a physical vapor deposition method. According to the semiconductor structure and the manufacturing method thereof, the problem that part of materials in the used work function adjusting layer are prone to oxidation in the work function adjusting process can be effectively relieved, and therefore the interlayer resistance value in the semiconductor structure is reduced, the work function adjusting process can be completed easily, and the performance of the semiconductor structure is improved.

Description

technical field [0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular, to a method for manufacturing a semiconductor structure and a semiconductor structure. Background technique [0002] A transistor is an important device in a dynamic random access memory (dynamic random access memory, DRAM for short), and the performance of the transistor affects the access performance of the DRAM device. [0003] As the size of transistors continues to shrink, HKMG (High-k and Metal Gate, high dielectric constant dielectric layer and metal gate) technology has become a common preparation method for transistor devices with feature sizes less than 45nm, which can improve the performance of transistors. switching speed, and reduce gate leakage current, thereby optimizing the access performance of DRAM devices. The transistor structure of HKMG includes a substrate, a silicon oxide layer, a high dielectric constant dielectric layer, a w...

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Problems solved by technology

[0004] However, the current process in different equipment of PVD and ALD tends to cause oxidation of the TiN layer in the work function adjustment layer, which makes it more difficult for Al or La elements to diffuse into the dielectric layer, and also leads to an increase in interlayer resistance. , affecting the performance of transistors, thus affecting the access performance of DRAM devices

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