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Compiler support method for alleviating false sharing problem

A compiler and false sharing technology, applied in the field of high-performance computing, can solve the problems of false sharing, the cache structure does not guarantee horizontal consistency, etc., to achieve the effect of increasing the interval, reducing the false sharing problem, and improving the write-back efficiency

Pending Publication Date: 2022-03-22
JIANGNAN INST OF COMPUTING TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The purpose of the present invention is to provide a compiler support method for alleviating the false sharing problem, and solve the false sharing problem that some Cache structures do not guarantee horizontal consistency.

Method used

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  • Compiler support method for alleviating false sharing problem

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Embodiment

[0018] Embodiment: The present invention provides a compiler support method for alleviating the false sharing problem, which specifically includes the following steps:

[0019] The __attribute__((cacheline)) interface based on configuration, the __attribute__((cacheline)) interface is used for variables that may have false sharing;

[0020] Include the following steps:

[0021] S1. In the program, the user uses the __attribute__((cacheline)) interface for variable declarations that may be falsely shared between multi-threaded caches, and the compiler performs the next operation on the variables using this interface;

[0022] S2. The compiler sets the flag bit cacheline in the base class tree_decl_common structure of the declared tree node to 1, sets align to the size of the cache line, and sets user_align in the base class tree_base structure of tree_decl_common to 1;

[0023] S3. When the compiler generates the assembly code of the variable, it determines the tree_decl_commo...

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Abstract

The invention discloses a compiler support method for relieving a false sharing problem, which comprises the following steps of: S1, respectively using an attrite (cache) interface for variable declarations which possibly have false sharing among multi-thread Caches in a program by a user; and S2, the compiler sets a flag bit cache in a base class treeclcommon structural body of the declaration tree node as 1, sets an align as the size of a Cache Line, and sets a user align in a base class treebase structural body of the treeclcommon as 1. According to the method, the problem of false sharing caused by the fact that certain Cache structures do not guarantee transverse consistency is solved.

Description

technical field [0001] The invention relates to a compiler support method for alleviating the false sharing problem, and belongs to the technical field of high-performance computing. Background technique [0002] In order to solve the gap between the running speed of the main memory and the CPU in the computer system, one or more levels of cache memory (Cache) are added between the CPU and the main memory. The Cache Line is the smallest unit for transferring data between the Cache and the main memory. When a Cache Line is copied from the main memory into the Cache, the Cache will create an entry for the Cache Line in the Cache, which contains both the memory data and the location information of the line of data in the memory. [0003] The Cache line is the basic unit of the CPU cache. When we access a piece of data, the entire Cache line where it is located will be cached into the Cache. In a multi-core or many-core chip, each core may have its own cache, so the same variab...

Claims

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Application Information

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IPC IPC(8): G06F9/50G06F8/41
CPCG06F9/5016G06F8/41
Inventor 王飞杨涛吴伟钱宏管茂林朱琪樊行健
Owner JIANGNAN INST OF COMPUTING TECH
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