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A low-power current divider

A low-power, current technology, applied in instruments, adjusting electrical variables, control/regulating systems, etc., can solve the problems of occupation, large chip area, and increase the complexity of circuit design, to overcome high dependence and simple structure Effect

Active Publication Date: 2022-05-13
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although digital-analog hybrid circuit design is the theme of integrated circuit development today, digital circuits are mostly used to assist analog circuit implementations because digital circuit implementation functions will increase the complexity of circuit design and occupy a large chip area. Function

Method used

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Embodiment Construction

[0009] Below in conjunction with accompanying drawing, technical solution of the present invention is described in detail:

[0010] The current divider circuit proposed by the present invention is as figure 1 shown. figure 1 Among them, VCC is the power rail in the high-voltage area of ​​the circuit, GND is the power rail in the low-voltage area, and all NMOS transistors work in the sub-threshold area. The first input current I 1 flows through the first NMOS transistor MN1, then

[0011] V of the first NMOS transistor MN1 GS1 The voltage can be derived as:

[0012]

[0013] According to Kirchhoff's current law, the total current flowing into the V1 node is equal to I 1 +I 2 +I ref , the current of the third current source I3 is equal to I 1 +I ref , then the current flowing through the second NMOS transistor MN2 is equal to I 2 , then the V of the second NMOS transistor MN2 GS2 Voltage can be expressed as:

[0014]

[0015] According to formula (1) and formul...

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Abstract

The invention belongs to the technical field of analog integrated circuits, and in particular relates to a low power consumption current divider. The present invention realizes the function of current division by only using four NMOS transistors. The circuit has the characteristics of simple structure, high reliability and wide application range, can be widely used in low-power digital-analog hybrid circuits, and has unique advantages compared with digital dividers. The beneficial effect of the invention is that it overcomes the disadvantage of high dependence of traditional mathematical logic operations on digital circuits. Using four NMOS transistors working in the sub-threshold region to form a current divider can realize the proportional relationship between the output current and the ratio of the two input currents in a large range.

Description

technical field [0001] The invention belongs to the technical field of analog integrated circuits, and in particular relates to a low power consumption current divider. Background technique [0002] With the advent of the 5G Internet of Things era, power consumption is increasing, and energy-saving and efficient system circuits have gradually become the primary consideration for designers. For integrated circuits, the power processing module consumes the most energy. Whether it is the capture of energy sources or the voltage regulation and conversion processing of DC / AC power, there is power loss. To improve the accuracy of energy capture, the maximum power point tracking circuit (Maximum Power Point Tracking, MPPT) is commonly used, but the MPPT algorithm will inevitably have mathematical operations, such as integral and differential, multiplication and division operations. In addition to MPPT circuits, many analog circuits, such as DC-DC converter adaptive compensation, a...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G05F1/56
CPCG05F1/561
Inventor 周泽坤龚州任航王卓张波
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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