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TSV electroplating filling additive constitutive model construction method and system

A technology of constitutive model and construction method, applied in electrical digital data processing, special data processing applications, instruments, etc., can solve the problems of low reliability, high cost, and large experimental workload, and achieve high reliability and low cost. , the effect of simple experimental steps

Pending Publication Date: 2021-09-17
长沙安牧泉智能科技有限公司
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Problems solved by technology

In this way, the experimental workload is large, the cost is high, and the reliability is low.
On the other hand, due to the lack of reliable and targeted constitutive model guidance, the industry often uses empirical methods to find the optimal concentration ratio of additives in the electroplating solution and the optimal electroplating process parameters, which is time-consuming and costly and low accuracy

Method used

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  • TSV electroplating filling additive constitutive model construction method and system
  • TSV electroplating filling additive constitutive model construction method and system
  • TSV electroplating filling additive constitutive model construction method and system

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Embodiment Construction

[0041] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0042] Such as figure 1 As shown, in the embodiment of the present invention, a flow chart of a construction method of a TSV electroplating filling additive constitutive model is proposed, which specifically includes the following steps:

[0043] Step S101, pretreating the electrodes; configuring the electroplating base solution and the additive to be tested, and pouring the diluted electroplating base solution into the five-port electrolytic cell.

[0044] In the embodiment of the present invention, the electrode pretreatment includes polishing and cleaning the electrode to ensure good conductivi...

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Abstract

The invention belongs to the field of integrated circuit three-dimensional packaging, and particularly relates to a TSV electroplating filling additive constitutive model construction method and system. The method comprises the following steps: pretreating an electrode; preparing an electroplating basic solution and a to-be-tested additive, and injecting the diluted electroplating basic solution into a five-opening electrolytic tank; connecting an electrolytic tank circuit, and measuring a current-time curve of the electroplating basic solution before and after the addition of the additive under the action of different potentials by adopting a chronoamperometry method; performing normalization processing on the current density according to the current-time curve to obtain the coverage rate of the additive; and fitting the change rules of the additive coverage rate along with the additive concentration under different potentials, and constructing the constitutive equation according to the adsorption kinetics of the additive. The experimental steps are simple, the cost is low, and the obtained constitutive model is high in reliability.

Description

technical field [0001] The invention belongs to the field of three-dimensional packaging of integrated circuits, and in particular relates to a method and system for constructing a constitutive model of a TSV electroplating filling additive. Background technique [0002] Integrated circuit technology develops rapidly with Moore's Law, and higher circuit integration density leads to higher interconnection density. Stacking and integrating chips with different functions (such as memory, processor, etc.) into a three-dimensional integrated package of a multifunctional system has become an inevitable choice to improve device performance and cost performance. [0003] A solution for three-dimensional integration uses a large number of high-density TSVs (Through Silicon Via, through-silicon vias) that run through the silicon substrate to realize the vertical interconnection between stacked chips and form high-density three-dimensional integration, bringing "high density, Versatil...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F30/3308G06F30/20G06F119/14
CPCG06F30/3308G06F30/20G06F2119/14
Inventor 朱文辉王峰吴厚亚
Owner 长沙安牧泉智能科技有限公司
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