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Pipeline-SAR ADC (Synthetic Aperture Radar Analog to Digital Converter) digital interstage gain calibration method based on metastable state detection

A technology of gain calibration and calibration method, which is applied in the direction of analog/digital conversion calibration/testing, etc., to achieve the effect of improving comparison accuracy, improving error, and small area

Active Publication Date: 2021-06-04
迈科微电子(深圳)有限公司
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  • Claims
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Problems solved by technology

[0004] The purpose of the present invention is to overcome the shortcoming of prior art, provide a kind of pipeline-SAR ADC digital stage gain calibration method based on metastable state detection, solve Problems during comparison with existing comparators

Method used

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  • Pipeline-SAR ADC (Synthetic Aperture Radar Analog to Digital Converter) digital interstage gain calibration method based on metastable state detection
  • Pipeline-SAR ADC (Synthetic Aperture Radar Analog to Digital Converter) digital interstage gain calibration method based on metastable state detection
  • Pipeline-SAR ADC (Synthetic Aperture Radar Analog to Digital Converter) digital interstage gain calibration method based on metastable state detection

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Embodiment

[0031] Such as figure 2 shown. In the digital circuit, the corresponding gain operation is performed on the received analog interface data step by step, and the G corresponding to each stage is calculated. cal , and then find the reciprocal to get rG cal ; Multiply the obtained reciprocal gain of each stage with the analog data of the corresponding stage, and then add them together to obtain the corrected output result of the SAR-ADC.

[0032] Take three-level metastable correction as an example. In the analog circuit, the successive comparisons are divided into four levels, and the metastable state of the second / third / fourth level is detected and corrected. Redundant capacitors are added to several stages of circuits (in order to avoid the over-range caused by comparator offset, and cooperate with digital circuits to complete comparator offset calibration.)

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Abstract

The invention relates to a pipeline-SAR ADC digital inter-stage gain calibration method based on metastable state detection. The method comprises the steps: carrying out the step-by-step comparison of an analog circuit, dividing the step-by-step comparison into N stages, carrying out the metastable state detection of comparators in the second stage to the Nth stage, and outputting a metastable state pointer of each stage to a digital circuit; when the pointer received by the digital calibration circuit is 1, accumulating the current data until the number of the accumulated data reaches the upper limit, completing the calibration of the stage, averaging the accumulated sum of the data, and taking the averaged sum as the inter-stage gain between the stage and the previous stage; and repeating the steps to obtain the inter-stage gain of each stage, and processing the inter-stage gain of each stage to obtain a calibration result of the digital calibration circuit. According to the invention, errors caused by capacitor mismatch of a common traditional SAR-ADC can be greatly improved; Meanwhile, the region is smaller than that of a correction type pipeline ADC, so that the comparison precision is greatly improved.

Description

technical field [0001] The invention relates to the technical field of digital signal processing, in particular to a pipeline-SAR ADC digital interstage gain calibration method based on metastable state detection. Background technique [0002] With the continuous development of modern technology, the requirements for the speed and resolution of analog-to-digital converters in aerospace, automotive applications, radio, image acquisition, radar communication, etc. are constantly increasing. Traditional analog-to-digital converters often use two structures, Pipeline-ADC and SAR-ADC, but no matter which one of the two is used, it has its own shortcomings; among them, the Pipeline-ADC structure has the following shortcomings when applied: first , Pipeline-ADC is greatly affected by capacitance mismatch, which greatly limits the resolution of Pipeline-ADC; second, Pipeline-ADC needs to be equipped with an error correction module, which will increase the power consumption and area ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/10
CPCH03M1/10
Inventor 邹勇贤
Owner 迈科微电子(深圳)有限公司
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