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Antistatic test machine for charging device model and test board applied to antistatic test machine

A charging device model and testing machine technology, which is applied in the direction of single semiconductor device testing, instrumentation, and electrical measurement, and can solve problems such as errors, pin 102 bending damage, and test result deviations.

Active Publication Date: 2021-05-11
SHANGHAI HUALI INTEGRATED CIRCUTE MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] However, if Figure 2b As shown, the pin 102 is suspended, then during the antistatic test process of the charging device model, the discharge needle 130 and the pin 102 of the suspended chip are in contact by physical pressing, and the suspended pin 102 is likely to be affected during the entire test process. Bending damage caused by external force will not only interfere with the charge and discharge test of the pin 102, but also cause poor contact between the pin 102 and the machine during the subsequent functional test and parameter test of the chip, resulting in deviations in test results or wrong

Method used

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  • Antistatic test machine for charging device model and test board applied to antistatic test machine
  • Antistatic test machine for charging device model and test board applied to antistatic test machine
  • Antistatic test machine for charging device model and test board applied to antistatic test machine

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Embodiment Construction

[0023] The technical solutions in the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Apparently, the described embodiments are part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0024] It should be understood that the invention can be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity, and like reference numerals designate like elements throughout. It will be understood ...

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Abstract

The invention relates to an antistatic test machine for a charging device model of an LQFP packaging chip, and relates to a semiconductor integrated circuit manufacturing technology, a plurality of LQFP packaging chip sockets are simultaneously arranged on a test board, and one LQFP packaging chip socket is arranged in a slot of each socket, so that the plurality of LQFP packaging chip sockets can be simultaneously carried on one test board; test time is saved in the antistatic test of the charging device model; and in addition, each LQFP packaging chip socket comprises a chip slot and a slot side wall which is formed by surrounding the slot, so that when the LQFP packaging chip is arranged in the chip slot, the pins of the chip extend out of the body of the chip and are borne on the first surface of the side wall of the slot to support the pins of the chip, and the pins of the chip are supported in the testing process, namely, the pins of the LQFP packaging chip are not suspended any more, so that accurate and lossless antistatic performance testing and subsequent functionality and parameter testing are ensured in the testing process, and the accuracy and the test efficiency of the chip-level test are improved.

Description

technical field [0001] The invention relates to the manufacturing technology of semiconductor integrated circuits, in particular to a charging device model antistatic testing machine for LQFP packaging level chips. Background technique [0002] The antistatic performance test is a link in the reliability test, which is used to characterize the ability of the chip product to withstand electrostatic shocks in actual use, and the charging device model is a must-test item in the antistatic test. [0003] With the development of semiconductor technology, the packaging forms of chips are diversified, among which the Low-profile Quad Flat Package (LQFP) is one of the packaging forms. For details, please refer to figure 1 The chip schematic diagram of a typical LQFP package form, the thickness of the body 101 of the LQFP package chip 100 is generally 1.4mm, and the pins 102 are suspended on the four sides of the body 101. Generally, the pins 102 are very thin and the number can reac...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/26
CPCG01R31/2601
Inventor 毕寒尹彬锋周柯高金德
Owner SHANGHAI HUALI INTEGRATED CIRCUTE MFG CO LTD
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